S29PL-J Datasheet, PDF (78/101 Pages) SPANSION – CMOS 3.0 Volt-only, Simultaneous-Read/Write Flash Memory with Enhanced VersatileIO Control

S29PL-J
20. DC Characteristics
Table 20.1 CMOS Compatible
Parameter Parameter Description (notes)
Test Conditions
Min
Typ Max Unit
I_LI
Input Load Current
I_LIT
A9, OE#, RESET#
Input Load Current
V_IN = V_SS to V_CC, V_CC = V_{CC max}
V_CC = V_{CC max}; V_ID= 12.5 V
1.0 µA
35
µA
I_LR
Reset Leakage Current
I_LO
Output Leakage Current
I_CC1
V_CC Active Read Current
(1, 2)
V_CC = V_{CC max}; V_ID= 12.5 V
V_OUT = V_SS to V_CC, OE# = V_IH
V_CC = V_{CC max}
OE# = V_IH, V_CC = V_{CC max}
5 MHz
10 MHz
35
µA
1.0 µA
20
30
mA
45
55
I_CC2
V_CC Active Write Current (2, 3)
OE# = V_IH, WE# = V_IL
I_CC3
V_CC Standby Current (2)
CE#, RESET#, WP#/ACC = V_IO 0.3 V
I_CC4
V_CC Reset Current (2)
RESET# = V_SS 0.3 V
I_CC5
Automatic Sleep Mode
(Notes 2, 4)
V_IH = V_IO  0.3 V; V_IL = V_SS 0.3 V
15
25
mA
0.2
5
µA
0.2
5
µA
0.2
5
µA
I_CC6
V_CC Active Read-While-Program
Current (1, 2)
OE# = V_IH,
5 MHz
10 MHz
21
45
mA
46
70
I_CC7
V_CC Active Read-While-Erase
Current (1, 2)
OE# = V_IH,
5 MHz
10 MHz
21
45
mA
46
70
I_CC8
V_CC Active Program-While-Erase-
Suspended Current (2, 5)
OE# = V_IH
17
25
mA
I_CC9
V_CC Active Page Read Current (2) OE# = V_IH, 8 word Page Read
V_IL
Input Low Voltage
V_IO = 1.65–1.95 V
(PL127J and PL129J)
V_IO = 2.7–3.6 V
V_IH
Input High Voltage
V_IO = 1.65–1.95 V
(PL127J AND PL129J)
V_IO = 2.7–3.6 V
V_HH
Voltage for ACC
Program Acceleration
V_CC = 3.0 V ± 10%
–0.4
–0.5
V_IO–0.4
2.0
8.5
10
15
mA
0.4
V
0.8
V
V_IO+0.4 V
V_CC+0.3 V
9.5
V
V_ID
Voltage for Autoselect and
Temporary Sector Unprotect
V_CC = 3.0 V  10%
11.5
12.5
V
V_OL
Output Low Voltage
V_OH
Output High Voltage
I_OL = 100 µA, V_CC = V_{CC min},
V_IO = 1.65–1.95 V
(PL127J AND PL129J)
I_OL = 2.0 mA, V_CC = V_{CC min},
V_IO = 2.7–3.6 V
I_OH = –100 µA, V_CC = V_{CC min},
V_IO = 1.65–1.95 V
(PL127J AND PL129J)
V_IO–0.1
0.1
V
0.4
V
V
V_LKO
Low V_CC Lock-Out Voltage (5)
I_OH = ––100 µA, V_IO = V_{CC min}
V_CC–0.2V
2.3
V
2.5
V
Notes
1. The I_CC current listed is typically less than 5 mA/MHz, with OE# at V_IH.
2. Maximum I_CC specifications are tested with V_CC = V_CCmax.
3. I_CC active while Embedded Erase or Embedded Program is in progress.
4. Automatic sleep mode enables the low power mode when addresses remain stable for t_ACC + 30 ns. Typical sleep mode current is 2 µA.
5. Not 100% tested.
6. In S29PL129J there are two CE# (CE1#, CE2#). Valid CE1#/CE2# conditions: (CE1# = V_IL, CE2# = V_IH,) or (CE1# = V_IH, CE2# = V_IL) or (CE1# = V_IH, CE2# = V_IH)
Document Number: 002-00615 Rev. *B
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