CY8C56LP Datasheet, PDF (70/120 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PRELIMINARY
PSoC^® 5LP: CY8C56LP Family
Datasheet
Figure 11-7. GPIO Output High Voltage and Current
Figure 11-8. GPIO Output Low Voltage and Current
Table 11-10. GPIO AC Specifications
Parameter
Description
TriseF
Rise time in Fast Strong Mode^[31]
TfallF
Fall time in Fast Strong Mode^[31]
TriseS
Rise time in Slow Strong Mode^[31]
TfallS
Fall time in Slow Strong Mode^[31]
GPIO output operating frequency
Conditions
Min
Typ
Max Units
3.3 V V_DDIO Cload = 25 pF
–
3.3 V V_DDIO Cload = 25 pF
–
3.3 V V_DDIO Cload = 25 pF
–
3.3 V V_DDIO Cload = 25 pF
–
–
12
ns
–
12
ns
–
60
ns
–
60
ns
2.7 V < V_DDIO < 5.5 V, fast strong drive mode 90/10% V_DDIO into 25 pF
–
Fgpioout 1.71 V < V_DDIO < 2.7 V, fast strong drive mode 90/10% V_DDIO into 25 pF
–
3.3 V < V_DDIO < 5.5 V, slow strong drive mode 90/10% V_DDIO into 25 pF
–
1.71 V < V_DDIO < 3.3 V, slow strong drive mode 90/10% V_DDIO into 25 pF
–
Fgpioin GPIO input operating frequency
90/10% V_DDIO
–
–
33
MHz
–
20
MHz
–
7
MHz
–
3.5
MHz
–
66
MHz
Figure 11-9. GPIO Output Rise and Fall Times, Fast Strong
Mode, V_DDIO = 3.3 V, 25 pF Load
Figure 11-10. GPIO Output Rise and Fall Times, Slow Strong
Mode, V_DDIO = 3.3 V, 25 pF Load
Note
31. Based on device characterization (Not production tested).
Document Number: 001-84935 Rev. **
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