CY8C56LP Datasheet, PDF (63/120 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PRELIMINARY
PSoC^® 5LP: CY8C56LP Family
Datasheet
11.2 Device Level Specifications
Specifications are valid for –40 °C ≤ T_A ≤ 85 °C and T_J ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted. Unless otherwise specified, all charts and graphs show typical values.
11.2.1 Device Level Specifications
Table 11-2. DC Specifications
Parameter
Description
Conditions
V_DDA
Analog supply voltage and input to Analog core regulator enabled
analog core regulator
V_DDA
Analog supply voltage, analog
regulator bypassed
Analog core regulator disabled
V_DDD
V_DDD
V_DDIO[17]
V_CCA
Digital supply voltage relative to V_SSD Digital core regulator enabled
Digital supply voltage, digital regulator Digital core regulator disabled
bypassed
I/O supply voltage relative to V_SSIO
Direct analog core voltage input
(Analog regulator bypass)
Analog core regulator disabled
V_CCD
Direct digital core voltage input (Digital Digital core regulator disabled
regulator bypass)
Active Mode
I_DD[18]
Sum of digital and analog IDDD + IDDA. V_DDX = 2.7 V to 5.5 V;
IDDIOX for I/Os not included. IMO
F_CPU = 3 MHz
enabled, bus clock and CPU clock
enabled. CPU executing complex
program from flash
V_DDX = 2.7 V to 5.5 V;
F_CPU = 6 MHz
V_DDX = 2.7 V to 5.5 V;
F_CPU = 12 MHz
V_DDX = 2.7 V to 5.5 V;
F_CPU = 24 MHz
V_DDX = 2.7 V to 5.5 V;
F_CPU = 48 MHz
V_DDX = 2.7 V to 5.5 V;
F_CPU = 62 MHz
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
Min
1.8
1.71
1.8
1.71
1.71
1.71
1.71
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Typ Max Units
–
5.5
V
1.8
1.89
V
–
V_DDA[16]
V
1.8
1.89
V
–
V_DDA[16]
V
1.8
1.89
V
1.8
1.89
V
1.9
3.8
mA
1.9
3.8
2
3.8
3.1
5
3.1
5
3.2
5
5.4
7
5.4
7
5.6
7
8.9
10.5
8.9
10.5
9.1
10.5
15.5
17
15.4
17
15.7
17
18
19.5
18
19.5
18.5 19.5
Notes
16. The power supplies can be brought up in any sequence however once stable V_DDA must be greater than or equal to all other supplies.
17. The V_DDIO supply voltage must be greater than the maximum voltage on the associated GPIO pins. Maximum voltage on GPIO pin ≤ V_DDIO ≤ V_DDA.
18. The current consumption of additional peripherals that are implemented only in programmed logic blocks can be found in their respective datasheets, available in
PSoC Creator, the integrated design environment. To estimate total current, find CPU current at frequency of interest and add peripheral currents for your particular
system from the device datasheet and component datasheets.
Document Number: 001-84935 Rev. **
Page 63 of 120