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W159 Datasheet, PDF (7/11 Pages) Cypress Semiconductor – Spread Spectrum System FTG for SMP Systems
W159
3V33 Clock Outputs, 3V33_0:1 (Lump Capacitance Test Load = 30 pF)
Parameter
Description
tP
Period
tH
High Time
tL
Low Time
tR
Output Rise Edge Rate
tF
Output Fall Edge Rate
tD
Duty Cycle
tJC
Jitter, Cycle-to-Cycle
Test Condition/Comments
Measured on rising edge at 1.5V[19]
Duration of clock cycle above 2.4V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Measured on rising edge at 1.5V. Maximum difference of
cycle time between two adjacent cycles.
Min. Typ. Max. Unit
30
ns
12
ns
12
ns
1
4 V/ns
1
4 V/ns
45
55 %
500 ps
tSK
Output Skew
Measured on rising edge at 1.5V
500 ps
tO
3V66 to 3V33 Clock Covers all 3V66 outputs. Measured on rising edge at 1.5V. 1.5
3.0 ns
Skew
3V66 leads 3V33 output.
tq
CPU to 3V33 Clock
Covers all 3V33 outputs. Measured on rising edge at 1.5V. 1.5
4.0 ns
Skew
CPU leads 3V33 output.
fST
Frequency Stabilization Assumes full supply voltage reached within 1 ms from
from Power-up (cold power-up. Short cycles exist prior to frequency stabilization.
start)
3 ms
Zo
AC Output Impedance Average value during switching transition. Used for deter-
15
Ω
mining series termination value.
REF Clock Outputs, REF0:1 (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Frequency generated by crystal oscillator
tR
Output Rise Edge Rate
Measured from 0.4V to 2.4V
tF
Output Fall Edge Rate
Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V
fST
Frequency Stabilization from Assumes full supply voltage reached within
Power-up (cold start)
1 ms from power-up. Short cycles exist prior to
frequency stabilization.
Zo
AC Output Impedance
Average value during switching transition. Used
for determining series termination value.
Note:
19. 3V33 clock is CPU/4 for CPU = 133 MHz and CPU/3 for CPU = 100 MHz.
Min.
0.5
0.5
45
Typ.
14.318
25
Max.
2
2
55
3
Unit
MHz
V/ns
V/ns
%
ms
Ω
Document #: 38-07163 Rev. *A
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