CY62137V Datasheet, PDF (7/11 Pages) Cypress Semiconductor – 2-Mbit (128K x 16) Static RAM

Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)^{[10, 15, 16]}
t_WC
ADDRESS
CE
t_AW
t_SA
WE
t_PWE
CY62137V MoBL^
t_HA
BHE/BLE
t_BW
OE
DATA I/O
NOTE 17
t_HZOE
Write Cycle No. 2 (CE Controlled) ^{[10, 15, 16]}
ADDRESS
CE
t_SA
t_SD
DATA_IN VALID
t_WC
t_AW
t_SCE
BHE/BLE
t_BW
WE
DATA I/O
t_PWE
t_SD
DATA_IN VALID
Notes:
15. Data I/O is high-impedance if OE = V_IH.
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
t_HD
t_HA
t_HD
Document #: 38-05051 Rev. *B
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