CY62137V Datasheet, PDF (2/11 Pages) Cypress Semiconductor – 2-Mbit (128K x 16) Static RAM

CY62137V MoBL^
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Pin Configurations
Min.
2.7
V_CC Range (V)
Typ.^[3]
3.0
Max.
3.6
Speed
(ns)
55
55
70
70
70
Power Dissipation
Operating, I_CC
(mA)
Typ.^[3] Max.
Standby, I_SB2
(µA)
Typ.^[3] Max.
7
20
1
15
7
20
1
5
7
15
1
15
7
15
1
5
7
15
1
20
TSOP II (Forward)
Top View
A₄ 1
A₃ 2
A₂ 3
A₁ 4
A₀ 5
CE 6
I/O₀ 7
I/O₁ 8
I/O₂ 9
I/O₃ 10
V_CC 11
V_SS 12
I/O₄ 13
I/O₅ 14
I/O₆ 15
I/O₇ 16
WE 17
A₁₆ ¹⁸
A₁₅ 19
A₁₄ 20
A₁₃ 21
A₁₂ ²²
44 _A5
43 A₆
42 _A7
41 OE
40 _BHE
39 _BLE
38 _I/O15
37 _I/O14
36 _I/O13
35 _I/O12
34 _VSS
33 _VCC
32 I/O₁₁
31 I/O₁₀
30 I/O₉
29 I/O₈
28 _NC
27 A₈
26 A₉
25 A₁₀
24 A11
23 NC
Pin Definitions
Pin Number
Type
Description
1-5, 18-22, 24-27, 42-45 Input
7-10, 13-16, 29-32, 35-38 Input/Output
23
No Connect
A₀-A₁₆. Address Inputs
I/O₀-I/O₁₅. Data lines. Used as input or output lines depending on operation
NC. This pin is not connected to the die
17
Input/Control WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted
6
Input/Control CE. When LOW, selects the chip. When HIGH, deselects the chip
39, 40
Input/Control
BHE, BLE. BHE = LOW selects higher order byte WRITEs or READs on the
SRAM.BLE = LOW selects lower order byte WRITEs or READs on the SRAM
41
Input/Control OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins
behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as
input data pins
12, 34
Ground
Vss. Ground for the device
11, 33
Power Supply Vcc. Power supply for the device
Notes:
2. NC pins are not connected on the die.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V_CC = V_CC(TYP)., T_A = 25°C.
Document #: 38-05051 Rev. *B
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