CY2XL11 Datasheet, PDF (7/7 Pages) Cypress Semiconductor – 100 MHz LVDS Clock Generator

CY2XL11
Document History Page
Document Title: CY2XL11 100 MHz LVDS Clock Generator
Document Number: 001- 42886
REV.
ECN NO.
Submission
Date
Orig. of
Change
Description of Change
**
2117527 See ECN WWZ/KVM New data sheet
/AESA
*A 2669117 03/05/2009 KVM/ Changed crystal and output frequency
AESA Removed MSL spec
Changed IIL value from -20 uA to -50 uA
Changed IIH value from 20 uA to 115 uA
Changed phase jitter value from 1 to 0.53 ps
Changed junction temp from 125°C to 135°C
Changed IDD from 150 mA to 120 mA
Rise / fall time changed to 350 ps to 500ps
Changed Data Sheet Status to Final
*B 2700242 04/30/2009 KVM/ Typo correction
PYRS Reformatted AC and DC tables
Added IDD spec for 2.5V
Added CINX and TLOCK specs
Changed CIN from 7pF to 15pF
*C 2718433 06/12/2009 WWZ/HMT No change. Submit to ECN for product launch.
*D 2764787 09/18/2009
KVM
Add clause to I_OZ Test Conditions
Change V_OD limits from 250/450 mV to 247/454 mV
Add max limit for T_R, T_F: 1.0 ns
Change T_OE max from 100 ns to 120 ns
Change T_LOCK max from 10 ms to 5 ms
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Document Number: 001-42886 Rev. *D
Revised September 18, 2009
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