CY2SSTV857-27 Datasheet, PDF (7/9 Pages) SpectraLinear Inc – Differential Clock Buffer/Driver DDR333/PC2700-Compliant

CY2SSTV857-27
AC Electrical Specifications (AV_DD = V_DDQ = 2.5V±5%, T_A = 0°C to +85°C)(continued)^{[9, 10]}
Parameter
t_PLZ, t_PHZ
t_CCJ
tjit(h-per)
Description
Output Disable Time^[12] (all outputs)
Cycle to Cycle Jitter ^[10]
Half-period jitter^{[10, 13]}
Condition
f > 66 MHz
f > 66 MHz
Min.
–75
–100
t_PLH(t_PD)
Low-to-High Propagation Delay, CLK to Y
Test Mode only
1.5
t_PHL(t_PD)
High-to-Low Propagation Delay, CLK to Y
1.5
t_SK(O)
Any Output to Any Output Skew^[14]
t_PHASE
Phase Error^[14]
–50
Typ.
3
–
–
3.5
3.5
Max. Unit
8
ns
75 ps
100 ps
7.5 ns
7.5 ns
100 ps
50 ps
Ordering Information
Part Number
CY2SSTV857ZC-27
CY2SSTV857ZC-27T
CY2SSTV857ZI-27
CY2SSTV857ZI-27T
Lead-free
CY2SSTV857ZXC-27
CY2SSTV857ZXC-27T
CY2SSTV857ZXI-27
CY2SSTV857ZXI-27T
Package Type
48-pin TSSOP
48-pin TSSOP–Tape and Reel
48-pin TSSOP
48-pin TSSOP–Tape and Reel
48-pin TSSOP
48-pin TSSOP–Tape and Reel
48-pin TSSOP
48-pin TSSOP–Tape and Reel
Product Flow
Commercial, 0° to 70°C
Commercial, 0° to 70°C
Industrial, –40° to +85°C
Industrial, –40° to +85°C
Commercial, 0° to 70°C
Commercial, 0° to 70°C
Industrial, –40° to +85°C
Industrial, –40° to +85°C
Notes:
13. Period jitter and half-period jitter specifications are separate specifications that must be met independently of each other.
14. All differential input and output terminals are terminated with 120Ω/16 pF, as shown in Figure 5.
Document #: 38-07464 Rev. *G
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