CY28439 Datasheet, PDF (7/22 Pages) SpectraLinear Inc – Clock Generator for Intel Grantsdale Chipset

PRELIMINARY
CY28439
Byte 6: Control Register 6
Bit
@Pup
Name
Description
7
0
TEST_SEL
REF/N or Tri-state Select
0 = Tri-state, 1 = REF/N Clock
6
0
TEST_MODE
Test Clock Mode Entry Control
0 = Normal operation, 1 = REF/N or Tri-state mode
5
HW
FS_D
FS_D reflects the value of the FS_D pin sampled on power-up.
0 = FS_D was low during VTT_PWRGD# assertion
4
1
REF
REF Output Drive Strength
0 = High, 1 = Low
3
1
PCI, PCIF and SRC clock SW PCI_STP# Function
outputs except those set 0=SW PCI_STP# assert, 1= SW PCI_STP# deassert
to free running
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
2
HW
FS_C
FS_C Reflects the value of the FS_C pin sampled on power-up
0 = FS_C was low during VTT_PWRGD# assertion
1
HW
FS_B
FS_B Reflects the value of the FS_B pin sampled on power-up
0 = FS_B was low during VTT_PWRGD# assertion
0
HW
FS_A
FS_A Reflects the value of the FS_A pin sampled on power-up
0 = FS_A was low during VTT_PWRGD# assertion
Byte 7: Vendor ID
Bit
@Pup
7
0
6
0
5
0
4
0
3
1
2
0
1
0
0
0
Name
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Description
Byte 8: Control Register 8
Bit
@Pup
7
0
Name
CPU_SS
6
0
CPU_DWN_SS
5
0
4
0
SRC_SS_OFF
SRC_SS
3
0
2
1
1
1
0
0
RESERVED
USB
PCI
RESERVED
Description
Spread Selection for CPU PLL
0: –0.5% (peak to peak)
1: –1.0% (peak to peak)
Spread Selection for CPU PLL
0: Down spread.
1: Center spread
SRC Spread Spectrum Enable
0 = Spread off, 1 = Spread on
Spread Selection for SRC PLL
0: –0.5% (peak to peak)
1: –1.0% (peak to peak)
RESERVED, Set = 0
USB 48-MHz Output Drive Strength
0 = 2x, 1 = 1x
33-MHz Output Drive Strength
0 = 2x, 1 = 1x
RESERVED
Document #: 38-07668 Rev. *D
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