CYIH1SM1000AA-HHCS Datasheet, PDF (6/71 Pages) Cypress Semiconductor – Detailed Specification - ICD

CYIH1SM1000AA-HHCS
5.9.3 Package lot acceptance
5 packages shall be chosen randomly from the lot and will be
measured in detail. All obtained results will be compared with
Figure 2 on page 25.
A solderability test is covered in the assembly lot acceptance
tests (Table 5.9.4).
5.9.4 Assembly Lot Acceptance
Test
Special assembly house in
process control
Bond strength test
Assembly House Geometrical
data review
Solder ability
Terminal strength
Marking permanence
Geometrical measurements
Temperature cycling
Test method
MIL-STD-883 method 2011
Review
MIL-STD883, method 2003
MIL-STD 883, method 2004
ESCC 24800
PID
MIL-STD 883, method 1010
Moisture resistance
DPA:
Die shear test
Bond pull test
JEDEC Std. Method A101-B
MIL-STD-883 method 2019
MIL-STD-883 method 2011
Number of
devices
Test condition
2
D
All
D
3
Test location
Assembly House
Assembly House
CY
Test House
All
CY
Condition B
50 cycles
5
-55°C/+125°C
Test House
240h at 85°C/85% Test House
N/A
4
All wires
Test House
Test House
Before and after the following tests are done:
■ Electrical measurements conform Table 4 on page 14 of this specification
■ Detailed visual inspection
■ Fine leak test + Gross leak test
Fine- and gross-leak tests shall be performed using the following methods:
Fine Leak test: MIL-STD-883, Test Method 1014, Condition A
Gross Leak test: MIL-STD-883, Test Method 1014, Condition C
The required leak rate for fine leak testing is 5·10-7 atms. cm3/s
Document Number: 001-54123 Rev. *A
Page 6 of 71
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