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CY2287 Datasheet, PDF (6/13 Pages) Cypress Semiconductor – 100-MHz Spread Spectrum Clock Synthesizer/Driver with USB, Hublink, and SDRAM Support
CY2287
CY2287 Switching Characteristics[8] Over the Operating Range
Parameter
Output
Description
Test Conditions
t1
All
Output Duty Cycle[9]
t1A/(t1A + t1B)
t2
CPU, APIC
Rising Edge Rate
Between 0.4V and 2.0V
t2
USB, REF
Rising Edge Rate
Between 0.4V and 2.4V
t2
PCI, 3V66
Rising Edge Rate
Between 0.4V and 2.4V
t2
SDRAM
Rising Edge Rate
Between 0.4V and 2.4V
t3
CPU, APIC
Falling Edge Rate
Between 2.0V and 0.4V
t3
USB, REF
Falling Edge Rate
Between 2.4V and 0.4V
t3
PCI, 3V66
Falling Edge Rate
Between 2.4V and 0.4V
t3
SDRAM
Falling Edge Rate
Between 2.4V and 0.4V
t4
CPU
CPU-CPU Skew
Measured at 1.25V
t4
SDRAM
SDRAM-SDRAM Skew
Measured at 1.5V
t4
APIC
APIC-APIC Skew
Measured at 1.25V
t4
PCI
PCI-PCI Skew
Measured at 1.5V
t4
t4
t4
t5
t6_66
t6_100
t7_66
t7_100
3V66
3V66-3V66 Skew
3V66, PCI
3V66-PCI Clock Skew
APIC, PCI
APIC-PCI Clock Skew
SDRAM, 3V66 SDRAM-3V66 Clock Skew
CPU, 3V66
CPU-3V66 Clock Skew
CPU, 3V66
CPU-3V66 Clock Skew
CPU, SDRAM CPU-SDRAM Clock Skew
CPU, SDRAM CPU-SDRAM Clock Skew
Measured at 1.5V
3V66 leads[10]
Coincident every edge[10, 11]
Coincident every other 3V66 edge[10]
CPU leads[10]
Coincident every other 3V66 edge[10]
SDRAM leads[10, 12]
CPU leads, measured every edge[10]
t8
CPU
Cycle-Cycle Clock Jitter
Measured at 1.25V, t8A – t8B
t8
SDRAM
Cycle-Cycle Clock Jitter
Measured at 1.5V, t8A – t8B
t8
APIC
Cycle-Cycle Clock Jitter
Measured at 1.25V, t8A – t8B
t8
USB
Cycle-Cycle Clock Jitter
Measured at 1.5V, t8A – t8B
t8
3V66
Cycle-Cycle Clock Jitter
Measured at 1.5V, t8A – t8B
t8
REF
Cycle-Cycle Clock Jitter
Measured at 1.5V, t8A – t8B
tSTABLE
All Outputs
Settle Time
All clock stabilization from power-up
Notes:
8. All parameters specified with loaded outputs as follows: CPU, APIC, REF, USB = 12.5 pF: SDRAM, 3V66, PCI=20 pF.
9. Duty cycle is measured at 1.5V when VDD = 3.3V. When VDD = 2.5V, duty cycle is measured at 1.25V.
10. Measured at 1.25V for 2.5V clocks and 1.5V for 3.3V clocks.
11. Coincident every other APIC edge if APIC running at 16 MHz.
12. Measured every third CPU edge.
Min.
45
1.0
0.5
1.0
1.0
1.0
0.5
1.0
1.0
1.5
7.0
2.0
4.5
Max.
55
4.0
2.0
4.0
4.0
4.0
2.0
4.0
4.0
175
250
250
500
175
4.0
500
500
8.0
500
3.0
5.5
250
250
500
500
500
1000
3
Unit
%
V/ns
V/ns
V/ns
V/ns
V/ns
V/ns
V/ns
V/ns
ps
ps
ps
ps
ps
ns
ps
ps
ns
ps
ns
ns
ps
ps
ps
ps
ps
ps
ms
6