CY2287 Datasheet, PDF (1/13 Pages) Cypress Semiconductor – 100-MHz Spread Spectrum Clock Synthesizer/Driver with USB, Hublink, and SDRAM Support

CY2287
100-MHz Spread Spectrum Clock Synthesizer/Driver with
USB, Hublink, and SDRAM Support
Features
• Mixed 2.5V and 3.3V Operation
• Multiple output clocks at different frequencies
— Three CPU clocks at 2.5V, up to 100 MHz
— Nine 3.3V SDRAM clocks at 100 MHz
— Eight synchronous PCI clocks at 33 MHz
— Two synchronous APIC clocks at 16.67 MHz or 33
MHz
— Two 3V66 clocks at 66 MHz
— Two USB clocks at 48 MHz
— One reference clock at 14.318 MHz
• Spread Spectrum clocking
— 31 kHz modulation frequency
— EPROM programmable percentage of spreading
— Default is –0.6%, which is recommended by Intel®
— Additional options of –0.25% and –0.4% available
• Power-down features
• I²C™ Interface
• Low skew and low jitter outputs
• Test Mode
• 56-pin SSOP package
Logic Block Diagram
XTALIN
XTALOUT
SEL0
SEL1
14.318
MHz
OSC.
CPU
PLL
EPROM
EPROM
Configurable
Logic
PWR_DWN
SYS
PLL
SCLK
SDATA
SERIAL INTERFACE
CONTROL LOGIC
Intel and Pentium are registered trademarks of Intel Corporation.
I²C is a trademark of Philips Corporation.
Benefits
Usable with Pentium II, K6, and 6x86 Processors
Single-chip main motherboard clock generator
— High-Speed Processor Support
— Supports Two 4-Clock SDRAM DIMMs
— Support for Six PCI Slots
— Synchronous to the CPU Clock
— Hublink Support
— Universal Serial Bus Support
— Also used as an input strap to determine APIC frequency
Enables reduction of EMI
Supports mobile systems
Dynamic output control
Meets tight system timing requirements at high frequency
Enables ATE and “bed of nails” testing
Widely available, standard package enables lower cost
REF0/SEL33 (14.318 MHz) ^REF0/SEL33
V_DDREF
XTAL_IN
XTAL_OUT
CPU [0–2] (66/100 MHz)
V_SSREF
V_SS3V66
3V66_0
SDRAM [0-8] (100 MHz)
3V66_1
V_DD3V66
V_DDPCI
PCI0
PCI1
PCI [0–7] (33MHz)
PCI2
APIC [0–1] (16.67/33MHz)
V_SSPCI
PCI3
PCI4
3V66 [0–1] (66MHz)
V_SSPCI
PCI5
USB [0–1] (48MHz)
PCI6
PCI7
V_DDPCI
AV_DD
AV_SS
V_SSUSB
USB0
USB1
V_DDUSB
SEL0
SSOP
Top View
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
V_SSAPIC
APIC0
APIC1
V_DDAPIC
CPU0
V_DDCPU
CPU1
CPU2
V_SSCPU
V_SSSDRAM
SDRAM0
SDRAM1
V_DDSDRAM
SDRAM2
SDRAM3
V_SSSDRAM
SDRAM4
SDRAM5
V_DDSDRAM
SDRAM6
SDRAM7
V_SSSDRAM
SDRAM8
V_DDSDRAM
PWRDWN
SCLK
SDATA
SEL1
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
June 23, 1999