CYW20702 Datasheet, PDF (53/55 Pages) Cypress Semiconductor – Bluetooth 4.0 + EDR and Low Energy compliant

CYW20702
Document History
Document Title: CYW20702 Single-Chip Bluetooth Transceiver and Baseband Processor
Document Number: 002-14773
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
**
–
–
04/20/2010 20702-DS100-RI
Initial release
*A
–
–
06/11/2010 20702-DS101-RI
Updated:
■ Power Amplifier
■ Programming
■ Package Options and TCXO Mode
■ Frequency Selection
■ Table 6. CYW20702 Signal Description
■ Section 8. Ball Grid Arrays
■ Figure 9. Startup Timing from RST_N
■ Figure 10. Startup Timing from Power-on Reset
■ Section 10. Mechanical Information
■ Section 11. Ordering Information
Removed:
■ Mobile handsets and smart phones from the chips relevant applications.
■ The 42-bump WLBGA package from the features list.
■ Mobile Phone Usage Model
■ Clock Request Output and TXCO OR Option
*B
–
–
08/16/2010 20702-DS102-RI
Updated:
■ Table 6. CYW20702 Signal Descriptions
■ Table 8. Absolute Maximum Voltages
■ Table 9. Power Supply
■ Table 11. Main Regulator (Main LDO) Electrical Specifications
*C
–
–
09/13/2010 20702-DS103-R
Updated:
■ The document number to show that the document is for external use.
*D
–
–
02/23/2011 20702-DS104-R
Updated:
■ Section 11. Ordering Information
*E
–
–
08/01/2011 20702-DS105-R
Updated:
■ Simultaneous UART Transport and Bridging
*F
–
–
08/15/2011 20702-DS106-R
Added:
■ SPI Timing
■ Electrostatic Discharge
*G
–
–
12/02/2011 20702-DS107-R
Updated:
■ Table 27. SPI Mode 0 and 2
*H
–
–
12/09/2011 20702-DS108-R
Updated:
■ Table 27. SPI Mode 0 and 2
Document Number: 002-14773 Rev. *L
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