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W130 Datasheet, PDF (5/8 Pages) Cypress Semiconductor – Spread Spectrum Desktop/Notebook System Clock
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PRELIMINARY
W130
DC Electrical Characteristics: TA = 0°C to +70°C, VDDQ3 = 3.3V±5%, VDDQ2 = 2.5V±5% (continued)
Parameter
Description
Test Condition
Min. Typ. Max. Unit
Crystal Oscillator
VTH
CLOAD
CIN,X1
X1 Input Threshold Voltage[3]
Load Capacitance, as seen by External Crystal[4]
X1 Input Capacitance[5]
Pin Capacitance/Inductance
VDDQ3 = 3.3V
Pin X2 unconnected
1.65
V
14
pF
28
pF
CIN
Input Pin Capacitance
Except X1 and X2
5
pF
COUT
Output Pin Capacitance
6
pF
LIN
Input Pin Inductance
7
nH
Notes:
3. X1 input threshold voltage (typical) is VDD/2.
4. The W130 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
14 pF; this includes typical stray capacitance of short PCB traces to crystal.
5. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
AC Electrical Characteristics
TA = 0°C to +70°C, VDDQ3 = 3.3V±5%,VDDQ2 = 2.5V± 5%, fXTL = 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output; Spread Spectrum clocking is disabled.
CPU Clock Outputs, CPU0:5 (Lump Capacitance Test Load = 20 pF)
CPU = 66.6 MHz CPU = 100 MHz
Parameter
Description
Test Condition/Comments
Min. Typ. Max. Min. Typ. Max. Unit
tP
Period
Measured on rising edge at 1.25V
15
15.5 10
10.5 ns
tH
High Time
Duration of clock cycle above 2.0V
5.2
3.0
ns
tL
Low Time
Duration of clock cycle below 0.4V
5.0
2.8
ns
tR
Output Rise Edge Rate Measured from 0.4V to 2.0V
1
41
4 V/ns
tF
Output Fall Edge Rate Measured from 2.0V to 0.4V
1
41
4 V/ns
tD
Duty Cycle
Measured on rising and falling edge at 45
1.25V
55 45
55 %
tJC
Jitter, Cycle-to-Cycle Measured on rising edge at 1.25V. Max-
200
imum difference of cycle time between
two adjacent cycles.
200 ps
tSK
Output Skew
Measured on rising edge at 1.25V
175
175 ps
fST
Frequency Stabiliza- Assumes full supply voltage reached
3
tion from Power-up
within 1 ms from power-up. Short cycles
(cold start)
exist prior to frequency stabilization.
3 ms
Zo
AC Output Impedance Average value during switching transi-
15
tion. Used for determining series termi-
nation value.
15
Ω
5
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