CY7C68013A_0905 Datasheet, PDF (44/62 Pages) Cypress Semiconductor – EZ-USB FX2LP™ USB Microcontroller High Speed USB Peripheral Controller

CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
10.8 Slave FIFO Asynchronous Read
Figure 19. Slave FIFO Asynchronous Read Timing Diagram^[20]
t_RDpwh
SLRD
FLAGS
t_RDpwl
t_XFD
t_XFLG
DATA
SLOE
N
t_OEon
N+1
t_OEoff
Table 22. Slave FIFO Asynchronous Read Parameters^[23]
Parameter
t_RDpwl
t_RDpwh
t_XFLG
t_XFD
t_OEon
t_OEoff
Description
SLRD Pulse Width LOW
SLRD Pulse Width HIGH
SLRD to FLAGS Output Propagation Delay
SLRD to FIFO Data Output Propagation Delay
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Min
Max
50
50
70
15
10.5
10.5
Unit
ns
ns
ns
ns
ns
ns
Note
23. Slave FIFO asynchronous parameter values use internal IFCLK setting at 48 MHz.
Document #: 38-08032 Rev. *M
Page 44 of 62
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