CY8C24094_11 Datasheet, PDF (40/59 Pages) Cypress Semiconductor – PSoC Programmable System-on-Chip Low power at high speed

CY8C24094, CY8C24794
CY8C24894, CY8C24994
Table 31. AC Digital Block Specifications (continued)
Function
Transmitter
Receiver
Description
Input clock frequency
V_DD ≥ 4.75 V, 2 stop bits
V_DD ≥ 4.75 V, 1 stop bit
V_DD < 4.75 V
Input clock frequency
V_DD ≥ 4.75 V, 2 stop bits
V_DD ≥ 4.75 V, 1 stop bit
V_DD < 4.75 V
Min Typ
–
–
–
–
–
–
–
–
–
–
–
–
Max
49.92
24.6
24.6
49.92
24.6
24.6
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Notes
The baud rate is equal to the input clock frequency
divided by 8.
The baud rate is equal to the input clock frequency
divided by 8.
10.4.7 AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V
and –40 °C ≤ T_A ≤ 85 °C, or 3.0 V to 3.6 V and –40 °C ≤ T_A ≤ 85 °C, respectively. Typical parameters are measured at 5 V and 3.3 V
at 25 °C and are for design guidance only.
Table 32. AC External Clock Specifications
Symbol
F_OSCEXT
–
–
Description
Frequency for USB applications
Duty cycle
Power-up to IMO switch
Min Typ Max Units
23.94 24 24.06 MHz
47
50
53
%
150
–
–
µs
Notes
10.4.8 AC Analog Output Buffer Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V
and –40 °C ≤ T_A ≤ 85 °C, or 3.0 V to 3.6 V and –40 °C ≤ T_A ≤ 85 °C, respectively. Typical parameters are measured at 5 V and 3.3 V
at 25 °C and are for design guidance only.
Table 33. 5-V AC Analog Output Buffer Specifications
Symbol
Description
Min Typ Max Units
t_ROB
Rising settling time to 0.1%, 1 V Step, 100 pF load
Power = low
Power = high
–
–
2.5
µs
–
–
2.5
µs
t_SOB
Falling settling time to 0.1%, 1 V Step, 100 pF load
Power = low
Power = high
–
–
2.2
µs
–
–
2.2
µs
SR_ROB
Rising slew rate (20% to 80%), 1 V Step, 100 pF load
Power = low
Power = high
0.65
–
0.65
–
–
V/µs
–
V/µs
SR_FOB
Falling slew rate (80% to 20%), 1 V Step, 100 pF load
Power = low
Power = high
0.65
–
0.65
–
–
V/µs
–
V/µs
BW_OBSS Small signal bandwidth, 20 mV_pp, 3 dB BW, 100 pF load
Power = low
0.8
–
Power = high
0.8
–
–
MHz
–
MHz
BW_OBLS
Large signal bandwidth, 1 V_pp, 3 dB BW, 100 pF load
Power = low
Power = high
300
–
300
–
–
kHz
–
kHz
Notes
Document Number: 38-12018 Rev. *Z
Page 40 of 59
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