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MB15E03SL Datasheet, PDF (4/29 Pages) Fujitsu Component Limited. – Single Serial Input PLL Frequency Synthesizer On-Chip 1.2 GHz Prescaler
MB15E03SL
■ PIN DESCRIPTION
Pin No.
Pin
SSOP QFN Name
1
15 OSCIN
2
16 OSCOUT
3
1
VP
4
2
VCC
5
3
DO
6
4
GND
7
5
Xfin
8
6
fin
9
7 Clock
10
8
Data
11
9
LE
12 10
PS
13 11
ZC
14 12 LD/fout
15 13
φP
16 14
φR
I/O
Descriptions
I
Programmable reference divider input.
Oscillator input connection to a TCXO.
O Oscillator output.
— Power supply voltage input for the charge pump.
— Power supply voltage input.
O
Charge pump output.
Phase of the charge pump can be selected via programming of the FC bit.
— Ground.
I Prescaler complementary input which should be grounded via a capacitor.
I
Prescaler input.
Connection to an external VCO should be done via AC coupling.
Clock input for the 19-bit shift register.
I Data is shifted into the shift register on the rising edge of the clock.
(Open is prohibited.)
I
Serial data input using binary code.
The last bit of the data is a control bit. (Open is prohibited.)
Load enable signal input. (Open is prohibited.)
I When LE is set high, the data in the shift register is transferred to a latch
according to the control bit in the serial data.
Power saving mode control. This pin must be set at “L” at Power-ON.
I
(Open is prohibited.)
PS = “H”; Normal mode
PS = “L”; Power saving mode
Forced high-impedance control for the charge pump (with internal pull up
I
resistor.)
ZC = “H”; Normal Do output.
ZC = “L”; Do becomes high impedance.
Lock detect signal output (LD)/phase comparator monitoring output (fout).
O
The output signal is selected via programming of the LDS bit.
LDS = “H”; outputs fout (fr/fp monitoring output)
LDS = “L”; outputs LD (“H” at locking, “L” at unlocking.)
O
Phase comparator N-channel open drain output for an external charge
pump. Phase can be selected via programming of the FC bit.
O
Phase comparator CMOS output for an external charge pump. Phase can
be selected via programming of the FC bit.
DS04–21359–6E
3