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CY2CC910_05 Datasheet, PDF (4/9 Pages) Cypress Semiconductor – 1:10 Clock Fanout Buffer
COMLINK™ SERIES
CY2CC910
High Frequency Parametrics
Parameter
Description
DJ
Jitter, Deterministic
Fmax
3.3V
Maximum frequency
VDD = 3.3V
Fmax
2.5V
Fmax
1.8V
Fmax(20)
tW
3.3V
tW
2.5V
tW
1.8V
Maximum frequency
VDD = 2.5V
Maximum frequency
VDD = 1.8V
Maximum frequency
VDD = 3.3V
Minimum pulse
VDD = 3.3V
Minimum pulse
VDD = 2.5V
Minimum pulse
VDD = 1.8V
Test Conditions
50% duty cycle tW(50–50)
The “point to point load circuit”
| Output Jitter – Input Jitter |
See Figure 4
50% duty cycle tW(50–50)
Standard Load Circuit.
See Figure 2
50% duty cycle tW(50–50)
The “point to point load circuit”
See Figure 4
The “point-to-point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
The “6-pF load circuit”
VIN = 1.7/0.0V VOUT = 1.2V/0.4V
20% duty cycle tW(20-80)
The “point to point load circuit”
VIN = 3.0V/0.0V VOUT = 2.3V/0.4V
The “point-to-point load circuit”
VIN = 3.0V/0.0V F = 100 MHz
VOUT = 2.0V/0.8V
The “point-to-point load circuit”
VIN = 2.4V/0.0V F = 100 MHz
VOUT = 1.7V/0.7V
The “6-pF load circuit”
VIN = 1.7V/0.0V VOUT = 1.2V/0.4V
See Figure 4
See Figure 6
See Figure 5
See Figure 4
See Figure 4
See Figure 6
Min. Typ. Max. Unit
20
ps
160 MHz
650
200 MHz
200 MHz
250 MHz
1
ns
1
ns
1
ns
AC Switching Characteristics @ 3.3V VDD = 3.3V ± 5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
tPLH
tPHL
tR
tF
tSK(0)
Propagation Delay – Low to High
See Figure 3 1.5
Propagation Delay – High to Low
1.5
Output Rise Time
Output Fall Time
Output Skew: Skew between outputs of the same package (in See Figure 10
phase).
tSK(p)
tSK(t)
Pulse Skew: Skew between opposite transitions of the same See Figure 9
output (tPHL – tPLH).
Package Skew: Skew between outputs of different packages at See Figure 11
the same power supply voltage, temperature and package type.
Typ.
2.7
2.7
0.8
0.8
Max.
3.5
3.5
0.2
0.2
0.4
Unit
ns
ns
V/ns
V/ns
ns
ns
ns
AC Switching Characteristics @ 2.5V VDD = 2.5V ± 5%, Temperature = –40°C to +85°C
Parameter
Description
tPLH
tPHL
tR
tF
tSK(0)
tSK(p)
tSK(t)
Propagation Delay – Low to High
See Figure 3
Propagation Delay – High to Low
Output Rise Time
Output Fall Time
Output Skew: Skew between outputs of the same package (in phase). See Figure 10
Pulse Skew: Skew between opposite transitions of the same output (tPHL See Figure 9
– tPLH).
Package Skew: Skew between outputs of different packages at the same See Figure 11
power supply voltage, temperature and package type.
Min.
1.5
1.5
Typ. Max. Unit
2.7 3.5 ns
2.7 3.5 ns
0.8
V/ns
0.8
V/ns
0.2 ns
0.2 ns
0.4 ns
Document #: 38-07348 Rev. *B
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