CY29352_07 Datasheet, PDF (4/9 Pages) Cypress Semiconductor – 2.5V or 3.3V, 200-MHz, 11-Output Zero Delay Buffer

CY29352
DC Parameters (V_DD= 3.3V ± 5%, T_A = –40°C to +85°C)
Parameter
Description
Condition
Min
V_IL
V_IH
V_OL
V_OH
I_IL
I_IH
I_DDA
I_DDQ
I_DD
C_IN
Z_OUT
Input Voltage, Low
Input Voltage, High
Output Voltage, Low^[4]
Output Voltage, High^[4]
Input Current, Low
Input Current, High^[5]
PLL Supply Current
Quiescent Supply Current
Dynamic Supply Current
Input Pin Capacitance
Output Impedance
LVCMOS
LVCMOS
2.0
I_OL = 24 mA
I_OL = 12 mA
I_OH = –24 mA
2.4
V_IL = V_SS
V_IL = V_DD
AV_DD only
All V_DD pins except AV_DD
AC Parameters^[6] (V_DD= 2.5V ± 5%, T_A = –40°C to +85°C)
Parameter
Description
Condition
f_VCO
f_in
VCO Frequency
Input Frequency
÷2 Feedback
÷4 Feedback
÷6 Feedback
÷8 Feedback
÷12 Feedback
Bypass mode (PLL_EN# = 1)
f_refDC
t_r , t_f
f_MAX
Input Duty Cycle
TCLK Input Rise/FallTime
Maximum Output Frequency
0.7V to 1.7V
÷2 Output
÷4 Output
÷6 Output
÷8 Output
÷12 Output
DC
Output Duty Cycle
f_MAX < 100 MHz
f_MAX > 100 MHz
t_r , t_f
Output Rise/Fall times
0.6V to 1.8V
t_(φ)
Propagation Delay (static phase TCLK to FB_IN, same V_DD,
offset)
does not include jitter
t_sk(O)
Output-to-Output Skew
Skew within Bank
Min
200
100
50
33.33
25
16.67
0
25
100
50
33.33
25
16.67
47
44
0.1
-100
Typ
Max
0.8
V_DD + 0.3
0.55
0.30
–10
100
5
10
3
5
240
4
14–17
Typ
Max
400
200
100
66.67
50
33.33
200
75
1.0
200
100
66.67
50
33.33
53
56
1.0
100
125
Unit
V
V
V
V
μA
μA
mA
mA
mA
pF
Ω
Unit
MHz
MHz
%
ns
MHz
%
ns
ps
ps
Note
6. AC characteristics apply for parallel output termination of 50Ω to V_TT. Outputs are at the same supply voltage unless otherwise stated. Parameters are
guaranteed by characterization and are not 100% tested.
Document #: 38-07476 Rev. *A
Page 4 of 9
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