CY28354-400 Datasheet, PDF (4/9 Pages) SpectraLinear Inc – 210 MHz 24 Output Buffer for 4-DDR DIMMS for VIA Chipsets Support

CY28354-400
Byte 22: Outputs Active/Inactive Register (1 = Active, 0 = Inactive), Default (Hi-z) = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
@Pup
0
0
0
0
1
1
1
1
Pin #
17
3
30,
29
32,
31
42,
41
44,
43
Description
Input Threshold Control
00: Normal (1.25V)
01: 1.20V
10: 1.15V
11: 1.10V
FBOUTA Control, 0 = Enable, 1 = Disable
FBOUTB Control, 0 = Enable, 1 = Disable
DDRBT5,
DDRBC5
DDRBT4,
DDRBC4
DDRBT3,
DDRBC3
DDRBT2,
DDRBC2
Byte 23: Outputs Active/Inactive Register (1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
@Pup
1
1
1
1
1
1
1
1
Pin #
7,
8
5,
6
36,
35
38,
37
21,
22
19,
20
13,
14
11,
12
DDRBT1,
DDRBC1
DDRBT0,
DDRBC0
DDRAT5,
DDRAC5
DDRAT4,
DDRAC4
DDRAT3,
DDRAC3
DDRAT2,
DDRAC2
DDRAT1,
DDRAC1
DDRAT0,
DDRAC0
Description
Document #: 38-07615 Rev. *B
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