CY24130_08 Datasheet, PDF (4/6 Pages) Cypress Semiconductor – HOTLink II™ SMPTE Receiver Training Clock

CY24130
Figure 4. ER = (0.6 x V_DD) /t₃, EF = (0.6 x V_DD) /t₄
t
3
t
4
V
DD
80% of V
DD
Clock
Output
Ordering Information
Ordering Code
Pb-free
CY24130ZXC-1^[2]
CY24130ZXC-1T^[2]
CY24130ZXC-2^[2]
CY24130ZXC-2T^[2]
CY24130KZXC-1
CY24130KZXC-1T
Package Type
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
16-Pin TSSOP
16-Pin TSSOP – Tape and Reel
20% of V
DD
0V
Operating Range
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Operating Voltage
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
Note
2. Not recommended for new design.
Document #: 38-07711 Rev. *A
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