CY7C66013C_11 Datasheet, PDF (34/61 Pages) Cypress Semiconductor – Full Speed USB (12 Mbps) Peripheral Controller with Integrated Hub

CY7C66013C, CY7C66113C
Hub Ports Speed
Bit #
7
Bit Name Reserved
Read/Write R/W
Reset
0
6
Reserved
R/W
0
Table 35. Hub Ports Speed
ADDRESS 0x4A
5
4
3
2
1
0
Reserved Reserved Port 4 Speed Port 3 Speed Port 2 Speed Port 1 Speed
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
Bit [0..3]: Port x Speed (where x = 1..4)
Set to 1 if the device plugged in to Port x is Low speed; Set to 0
if the device plugged in to Port x is Full speed.
Bit [7..4]: Reserved.
The Hub Ports Speed register is cleared to zero by reset or bus
reset. This must be set by the firmware on issuing a port reset.
The Reserved bits [7..4] should always read as ‘0.’
Enabling and Disabling a USB Device
After a USB device connection is detected, firmware must
update status change bits in the hub status change data
structure that is polled periodically by the USB host. The host
responds by sending a packet that instructs the hub to reset and
enable the downstream port. Firmware then sets the bit in the
Hub Ports Enable register, Table 36, for the downstream port.
The hub repeater hardware responds to an enable bit in the Hub
Ports Enable register by enabling the downstream port, so that
USB traffic flows to and from that port.
If a port is marked enabled and is not suspended, it receives all
USB traffic from the upstream port, and USB traffic from the
downstream port is passed to the upstream port (unless babble
is detected). Low speed ports do not receive full speed traffic
from the upstream port.
When firmware writes to the Hub Ports Enable register to enable
a port, the port is not enabled until the end of any packet currently
being transmitted. If there is no USB traffic, the port is enabled
immediately.
When a USB device disconnection is detected, firmware must
update status bits in the hub change status data structure that is
polled periodically by the USB host. In suspend, a connect or
disconnect event generates an interrupt (if the hub interrupt is
enabled) even if the port is disabled.
Table 36. Hub Ports Enable Register
Hub Ports Enable Register
ADDRESS 0x49
Bit #
7
6
5
4
3
2
1
0
Bit Name
Reserved
Reserved
Reserved
Reserved
Port 4
Enable
Port 3
Enable
Port 2
Enable
Port 1
Enable
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit [0..3]: Port x Enable (where x = 1..4)
Set to 1 if Port x is enabled; Set to 0 if Port x is disabled.
Bit [7..4]: Reserved.
The Hub Ports Enable register is cleared to zero by reset or bus
reset to disable all downstream ports as the default condition. A
port is also disabled by internal hub hardware (enable bit
cleared) if babble is detected on that downstream port. Babble is
defined as:
■ Any non idle downstream traffic on an enabled downstream
port at EOF2
■ Any downstream port with upstream connectivity established
at EOF2 (that is, no EOP received by EOF2).
Document Number: 38-08024 Rev. *G
Page 34 of 61
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