CYW20734 Datasheet, PDF (33/51 Pages) Cypress Semiconductor – Single-Chip Bluetooth Transceiver for Wireless Input Devices

CYW20734
Table 18. BLE RF Specifications
Parameter
Frequency range
RX sense^a
TX power^b
Mod Char: Delta F1 average
Mod Char: Delta F2 max^c
Mod Char: Ratio
Conditions
N/A
GFSK, 0.1% BER, 1 Mbps
N/A
N/A
N/A
N/A
Minimum
2402
–
–
225
99.9
0.8
Typical
–
–96.5
9
255
–
0.95
Maximum
2480
–
–
275
–
–
Unit
MHz
dBm
dBm
kHz
%
%
a. Dirty TX is Off.
b. The BLE TX power can be increased to compensate for front-end losses such as BPF, diplexer, switch, etc. The output is capped at 12 dBm
out. The BLE TX power at the antenna port cannot exceed the 10 dBm EIRP specification limit.
c. At least 99.9% of all delta F2 max frequency values recorded over 10 packets must be greater than 185 kHz.
3.3 Timing and AC Characteristics
In this section, use the numbers listed in the Reference column of each table to interpret the following timing diagrams.
3.3.1 UART Timing
Table 19. UART Timing Specifications
Reference
1
Characteristics
Delay time, UART_CTS_N low to UART_TXD valid
2
Setup time, UART_CTS_N high before midpoint of stop bit
3
Delay time, midpoint of stop bit to UART_RTS_N high
Min.
–
–
–
Max.
24
10
2
Unit
Baud out
cycles
ns
Baud out
cycles
Figure 9. UART Timing
Document Number: 002-14874 Rev. *S
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