W191 Datasheet, PDF (3/10 Pages) SpectraLinear Inc – Skew Controlled SDRAM Buffer

Table 2. Data Bytes 0–2 Serial Configuration Map^[2]
Affected Pin
Bit(s)
Pin No.
Pin Name
Control Function
Data Byte 0 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
6
SDRAM2
Clock Output Disable
6
--
--
(Reserved)
5
--
--
(Reserved)
4
--
--
(Reserved)
3
--
--
(Reserved)
2
3
SDRAM1
Clock Output Disable
1
--
--
(Reserved)
0
1
SDRAM0
Clock Output Disable
Data Byte 1 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
--
--
Clock Output Disable
6
15
SDRAM5
Clock Output Disable
5
--
--
Clock Output Disable
4
--
--
(Reserved)
3
13
SDRAM4
Clock Output Disable
2
--
--
(Reserved)
1
--
--
(Reserved)
0
--
--
(Reserved)
Data Byte 2 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
11
SDRAM3
Clock Output Disable
6
--
--
(Reserved)
5
--
--
(Reserved)
4
--
--
(Reserved)
3
--
--
(Reserved)
2
--
--
(Reserved)
1
--
--
(Reserved)
0
--
--
(Reserved)
Note:
2. At power up all SDRAM outputs are enabled and active. Program Reserved bits to 0.
W191
Bit Control
0
1
Low
Active
--
--
--
--
--
--
--
--
Low
Active
--
--
--
--
--
--
Low
Active
--
--
--
--
Low
Active
--
--
--
--
--
--
Low
Active
--
--
--
--
--
--
--
--
--
--
--
--
--
--
Document #: 38-07008 Rev. *B
Page 3 of 10