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CY7C1297A Datasheet, PDF (3/13 Pages) Cypress Semiconductor – 64K X 18 Synchronous Burst SRAM
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Pin Configuration
CY7C1297A/
GVT7164B18
100-pin TQFP
Top View
NC
NC
NC
VCCQ
VSSQ
NC
NC
DQ9
DQ10
VSSQ
VCCQ
DQ11
DQ12
NC
VCC
NC
VSS
DQ13
DQ14
VCCQ
VSSQ
DQ15
DQ16
DQP2
NC
VSSQ
VCCQ
NC
NC
NC
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
11
70
12
69
13
68
14
67
15 CY7C1297A/GVT7164B18 66
16
65
17
64
18
63
19
62
20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
A10
NC
NC
VCCQ
VSSQ
NC
DQP1
DQ8
DQ7
VSSQ
VCCQ
DQ6
DQ5
VSS
NC
VCC
ZZ
DQ4
DQ3
VCCQ
VSSQ
DQ2
DQ1
NC
NC
VSSQ
VCCQ
NC
NC
NC
Pin Descriptions
QFP Pins
Pin Name
Type
Description
37, 36, 35, 34, 33,
32, 100, 99, 82, 81,
80, 48, 47, 46, 45,
44
A0–A16
Input- Addresses: These inputs are registered and must meet the set-up and hold
Synchronous times around the rising edge of CLK. The burst counter generates internal
addresses associated with A0 and A1, during burst and wait cycles.
93, 94
WEL, WEH
Input-
Synchronous
Byte Write Enables: A byte Read enable is LOW for a Write cycle and HIGH
for a Read cycle. WEL controls DQ1–DQ8 and DQP1. WEH controls
DQ9–DQ16 and DQP2. Data I/O are high impedance if either of these inputs
are LOW, conditioned by BWE LOW.
87
BWE
Input- Write Enable: This active LOW input gates byte Read operations and must
Synchronous meet the set-up and hold times around the rising edge of CLK.
88
GW
Input- Global Write: This active LOW input allows a full 18-bit Write to occur
Synchronous independent of the BWE and WEn lines and must meet the set-up and hold
times around the rising edge of CLK.
89
CLK
Input- Clock: This signal registers the addresses, data, chip enables, Write control
Synchronous and burst control inputs on its rising edge. All synchronous inputs must meet
set-up and hold times around the clock’s rising edge.
98
CE
Input- Chip Enable: This active LOW input is used to enable the device and to gate
Synchronous ADSP.
92
CE2
Input- Chip Enable: This active LOW input is used to enable the device.
Synchronous
97
CE2
Input- Chip Enable: This active HIGH input is used to enable the device.
Synchronous
Document #: 38-05204 Rev. *A
Page 3 of 13
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