CY62127DV30_09 Datasheet, PDF (3/11 Pages) Cypress Semiconductor – 1-Mb (64K x 16) Static RAM

CY62127DV30
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage to Ground Potential
......................................................................... −0.3V to 3.9V
DC Voltage Applied to Outputs
in High-Z State^[5] ....................................−0.3V to V_CC + 0.3V
DC Input Voltage^[5] ................................ −0.3V to V_CC + 0.3V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Operating Range
Range
Industrial
Automotive
Ambient Temperature (T_A)
–40°C to +85°C
–40°C to +125°C
V_CC^[6]
2.2V to 3.6V
2.2V to 3.6V
DC Electrical Characteristics (Over the Operating Range)
Parameter Description
Test Conditions
–45
–55
–70
Min. Typ.^[4] Max. Min. Typ.^[4] Max. Min Typ.^[4] Max. Unit
V_OH
Output HIGH 2.2 < V_CC < 2.7 I_OH = −0.1 mA 2.0
Voltage
2.7 < V_CC < 3.6 I_OH = −1.0 mA 2.4
V_OL
Output LOW 2.2 < V_CC < 2.7 I_OL = 0.1 mA
Voltage
2.7 < V_CC < 3.6 I_OL = 2.1 mA
V_IH
Input HIGH 2.2 < V_CC < 2.7
1.8
Voltage
2.0
2.4
0.4
0.4
V_CC 1.8
+ 0.3
2.0
2.4
0.4
0.4
V_CC 1.8
+ 0.3
V
0.4 V
0.4
V_CC V
+ 0.3
2.7 < V_CC < 3.6
2.2
V_CC 2.2
V_CC 2.2
V_CC
+ 0.3
+ 0.3
+ 0.3
V_IL
Input LOW 2.2 < V_CC < 2.7
Voltage
2.7 < V_CC < 3.6
I_IX
Input Leakage GND < V_I < V_CC
Current
−0.3
−0.3
Ind’l −1
Auto
0.6 −0.3
0.8 −0.3
+1 −1
−4
0.6 −0.3
0.8 −0.3
+1 −1
+4
0.6 V
0.8
+1 µA
µA
I_OZ
Output
GND < V_O < V_CC, Output Ind’l −1
Leakage
Current
Disabled
Auto
+1 −1
−4
+1 −1
+4
+1 µA
µA
I_CC
V_CC Operating f = f_MAX = 1/t_RC V_CC = 3.6V,
Supply Current _{f = 1 MHz}
I_OUT = 0 mA,
CMOS level
6.5 13
0.85 1.5
5 10
0.85 1.5
5 10 mA
0.85 1.5
I_SB1
Automatic CE CE > V_CC − 0.2V,
L Ind’l
Power-down V_IN > V_CC − 0.2V, V_IN
Current—
< 0.2V,
Auto
CMOS Inputs f = f_MAX (Address and LL
Data Only),
f = 0 (OE, WE, BHE
and BLE)
1.5 5
1.5 4
1.5 5
1.5 15
1.5 4
1.5 5 µA
1.5 4
I_SB2
Automatic CE CE > V_CC − 0.2V,
L Ind’l
Power-down V_IN > V_CC − 0.2V or
Current—
V_IN < 0.2V,
Auto
CMOS Inputs f = 0, V_CC = 3.6V
LL
1.5 5
1.5 4
1.5 5
1.5 15
1.5 4
1.5 5 µA
1.5 4
Capacitance^[7]
Parameter
Description
Test Conditions
C_IN
C_OUT
Input Capacitance
Output Capacitance
T_A = 25°C, f = 1 MHz
V_CC = V_CC(typ)
Notes:
5. V_IL(min.) = −2.0V for pulse durations less than 20 ns., V_IH(max.) = Vcc+0.75V for pulse durations less than 20 ns.
6. Full device operation requires linear ramp of V_CC from 0V to V_CC(min) & V_CC must be stable at V_CC(min) for 500 µs.
7. Tested initially and after any design or proces changes that may affect these parameters.
Max.
8
8
Unit
pF
pF
Document #: 38-05229 Rev. *H
Page 3 of 11
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