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| CY62127DV30_09 Datasheet, PDF (2/11 Pages) Cypress Semiconductor – 1-Mb (64K x 16) Static RAM | |||
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CY62127DV30
Product Portfolio
Product
CY62127DV30L
CY62127DV30LL
CY62127DV30L
VCC Range (V)
Min. Typ. Max.
2.2 3.0 3.6
2.2 3.0 3.6
Speed
(ns)
45
45
55
CY62127DV30LL 2.2 3.0 3.6
55
CY62127DV30L 2.2 3.0 3.6 70
CY62127DV30LL
70
Power Dissipation
Operating, ICC (mA)
f = 1 MHz
Typ[4] Max.
Typ.[4]
f = fMAX
Max.
Range
0.85
1.5
6.5
13
Indâl
0.85
1.5
6.5
13
Indâl
0.85
1.5
5
10
Indâl
Auto
0.85
1.5
5
10
Indâl
0.85
1.5
5
10
Indâl
0.85
1.5
5
10
Indâl
Pin Configurations[2, 3]
Standby ISB2 (µA)
Typ.[4] Max.
1.5
5
1.5
4
1.5
5
1.5
15
1.5
4
1.5
5
1.5
4
FBGA (Top View)
12 34 56
BLE OE A0 A1 A2 NC
A
I/O8 BHE A3 A4 CE I/O0
B
I/O9 I/O10 A5 A6 I/O1 I/O2
C
VSS I/O11 NC A7 I/O3 VCC
D
VCC I/O12 DNU NC I/O4 VSS
E
I/O14 I/O13 A14 A15 I/O5 I/O6
F
I/O15 NC A12 A13 WE I/O7
G
NC A8 A9 A10 A11 NC
H
TSOP II (Forward)
Top View
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
I/O0 7
I/O1 8
I/O2 9
I/O3 10
VCC 11
VSS 12
I/O4 13
I/O5 14
I/O6 15
I/O7 16
WE 17
A15 18
A14 19
A13 20
A12 21
NC 22
44 A5
43 A6
42 A7
41 OE
40 BHE
39 BLE
38 I/O15
37 I/O14
36 I/O13
35 I/O12
34 VSS
33 VCC
32 I/O11
31 I/O10
30 I/O9
29 I/O8
28 NC
27 A8
26 A9
25 A10
24 A11
23 DNU
Notes:
2. NC pins are not connected to the die.
3. Pin #23 of TSOP II and E3 ball of FBGA are DNU, which have to be left floating or tied to Vss to ensure proper application. (Expansion Pins on FBGA Package:
E4 - 2M, D3 - 4M, H1 - 8M, G2 - 16M, H6 - 32M).
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25°C.
Document #: 38-05229 Rev. *H
Page 2 of 11
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