CY7C603XX_11 Datasheet, PDF (28/39 Pages) Cypress Semiconductor – enCoRe™ III Low Voltage

CY7C603xx
I2C_SDA
I2C_SCL
Figure 14. Definition of Timing for Fast-/Standard-Mode on the I²C Bus
T_SUDATI2C
T_HDSTAI2C
T_HDDATI2C^TSUSTAI2C
T_SPI2C
T_BUFI2C
T_HIGHI2C T_LOWI2C
S
START Condition
T_SUSTOI2C
Sr
P
S
Repeated START Condition
STOP Condition
Packaging Information
This section illustrates the packaging specifications for the CY7C603xx device, along with the thermal impedances for each package.
Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of
the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at http://www.cypress.com.
Packaging Dimensions
Figure 15. 28-pin (210-Mil) SSOP
Document Number: 38-16018 Rev. *L
51-85079 *D
Page 28 of 39
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