CYRF6936 Datasheet, PDF (27/40 Pages) Cypress Semiconductor – WirelessUSB™ LP 2.4 GHz Radio SoC

CYRF6936
Mnemonic
CLK_EN_ADR
Bit
7
6
5
4
3
2
Default
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
Function
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
This register provides the ability to override some automatic features of the device.
Bits 7:2
Reserved. Must be zero.
Bit 1
Force Receive Clock Enable. Streaming applications MUST set this bit during initialization.
Bit 0
Reserved. Must be zero.
Address
1
0
W
RXF
0x28
0
0
W
RSVD
Mnemonic
RX_ABORT_ADR
Address
0x29
Bit
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Function
RSVD
RSVD
ABORT EN
RSVD
RSVD
RSVD
RSVD
RSVD
This register provides the ability to override some automatic features of the device.
Bits 7:6
Reserved. Must be zero.
Bit 5
Receive Abort Enable. Typical applications disrupt any pending receive by first setting this bit, otherwise this bit is cleared.
Bits 4:0
Reserved. Must be zero.
Mnemonic
AUTO_CAL_TIME_ADR
Bit
7
6
5
4
3
2
Default
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
Function
AUTO_CAL_TIME
This register provides the ability to override some automatic features of the device.
Bits 7:0
Auto Cal Time. Firmware MUST write 3Ch to this register during initialization.
Address
1
1
W
0x32
0
1
W
Mnemonic
AUTO_CAL_OFFSET_ADR
Bit
7
6
5
4
3
2
Default
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
Function
AUTO_CAL_OFFSET
This register provides the ability to override some automatic features of the device.
Bits 7:0
Auto Cal Offset. Firmware MUST write 14h to this register during initialization.
Address
1
0
W
0x35
0
0
W
Document #: 38-16015 Rev. *G
Page 27 of 40
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