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CY8CPLC20_11 Datasheet, PDF (26/56 Pages) Cypress Semiconductor – Powerline Communication Solution Frequency shift keying modulation
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CY8CPLC20
9.3.6 DC Analog Reference Specifications
Table 9-8 lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and
–40 C  TA  85 C. Typical parameters are measured at 5 V at 25C and are for design guidance only.
The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks. The power levels for AGND refer to
the power of the Analog Continuous Time PSoC block. The power levels for RefHi and RefLo refer to the Analog Reference Control
register. The limits stated for AGND include the offset error of the AGND buffer local to the Analog Continuous Time PSoC block.
Reference control power is high.
Note Avoid using P2[4] for digital signaling when using an analog resource that depends on the Analog Reference. Some coupling
of the digital signal may appear on the AGND.
Table 9-8. 5-V DC Analog Reference Specifications
Reference Reference Power
ARF_CR[5:3]
Settings
RefPower = High
Opamp bias = High
0b000
RefPower = High
Opamp bias = Low
RefPower = Med
Opamp bias = High
RefPower = Med
Opamp bias = Low
Symbol
VREFHI
VAGND
VREFLO
VREFHI
VAGND
VREFLO
VREFHI
VAGND
VREFLO
VREFHI
VAGND
VREFLO
Reference Description
Ref High
AGND
Ref Low
Ref High
AGND
Ref Low
Ref High
AGND
Ref Low
Ref High
AGND
Ref Low
VDD/2 + Bandgap
VDD/2
VDD/2 – Bandgap
VDD/2 + Bandgap
VDD/2
VDD/2 – Bandgap
VDD/2 + Bandgap
VDD/2
VDD/2 – Bandgap
VDD/2 + Bandgap
VDD/2
VDD/2 – Bandgap
Min
VDD/2 + 1.228
VDD/2 – 0.078
VDD/2 – 1.336
VDD/2 + 1.224
VDD/2 – 0.056
VDD/2 – 1.338
VDD/2 + 1.226
VDD/2 – 0.057
VDD/2 – 1.337
VDD/2 + 1.226
VDD/2 – 0.047
VDD/2 – 1.338
Typ
Max
Unit
VDD/2 + 1.290 VDD/2 + 1.352 V
VDD/2 – 0.007 VDD/2 + 0.063 V
VDD/2 – 1.295 VDD/2 – 1.250 V
VDD/2 + 1.293 VDD/2 + 1.356 V
VDD/2 – 0.005 VDD/2 + 0.043 V
VDD/2 – 1.298 VDD/2 – 1.255 V
VDD/2 + 1.293 VDD/2 + 1.356 V
VDD/2 – 0.006 VDD/2 + 0.044 V
VDD/2 – 1.298 VDD/2 – 1.256 V
VDD/2 + 1.294 VDD/2 + 1.359 V
VDD/2 – 0.004 VDD/2 + 0.035 V
VDD/2 – 1.299 VDD/2 – 1.258 V
Document Number: 001-48325 Rev. *J
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