CY7C63743-SXC Datasheet, PDF (24/49 Pages) Cypress Semiconductor – enCoRe™ USB Combination Low-Speed USB and PS/2 Peripheral Controller

FOR
CY7C63722
FOR
CY7C63723
CY7C63743
18.0 12-bit Free-running Timer
The 12-bit timer operates with a 1-µs tick, provides two inter-
rupts (128-µs and 1.024-ms) and allows the firmware to
directly time events that are up to 4 ms in duration. The lower
eight bits of the timer can be read directly by the firmware.
Reading the lower eight bits latches the upper four bits into a
temporary register. When the firmware reads the upper four
bits of the timer, it is actually reading the count stored in the
temporary register. The effect of this is to ensure a stable 12-bit
timer value can be read, even when the two reads are
separated in time.
Bit #
76543210
Bit Name
Timer [7:0]
Read/Write R R R R R R R R
Reset
00000000
Figure 18-1. Timer LSB Register (Address 0x24)
Bit [7:0]: Timer lower eight bits
Bit #
76543210
Bit Name
Reserved
Timer [11:8]
Read/Write - - - - R R R R
Reset
00000000
Figure 18-2. Timer MSB Register (Address 0x25)
Bit [7:4]: Reserved
Bit [3:0]: Timer upper four bits
1.024-ms interrupt
128-µs interrupt
11 10 9 8 7 6 5 4 3 2 1 0
1 MHz clock
L3 L2 L1 L0
D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
8
Figure 18-3. Timer Block Diagram
To Timer Registers
Document #: 38-08022 Rev. *B
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