CYP15G0402DX Datasheet, PDF (22/27 Pages) Cypress Semiconductor – Quad HOTLinkII SERDES

PRELIMINARY
CYP15G0402DX
CYP15G0402DX Receiver LVTTL Switching Characteristics Over the Operation Range
Parameter
Description
Min.
f_RS
t_RXCLKP
t_RXCLKH
RXCLKx Clock Output Frequency
RXCLKx Period
RXCLKx HIGH Time (RXRATE = HIGH)
RXCLKx HIGH Time (RXRATE = LOW)
20
6.66
1.5
5
t_RXCLKL
RXCLKx LOW Time (RXRATE = HIGH)
1.5
RXCLKx LOW Time (RXRATE = LOW)
5
t_RXCLKD
t_RXCLKR[20]
t_RXCLKF[20]
t_RXDV-[21]
t_RXDV+[21]
t_RXDV-[21]
t_RXDV+[21]
RXCLKx Duty Cycle centered with a 50% HIGH Time
RXCLKx Rise Time
RXCLKx Fall Time
Status and Data Valid Time From RXCLKx (RXCKSEL HIGH or MID)
Status and Data Valid Time From RXCLKx (RXCKSEL HIGH or MID)
Status and Data Invalid Time From RXCLKx (half-rate clock)
Status and Data Invalid Time From RXCLKx (half-rate clock)
–1.0
0.3
0.3
5UI–1.5
5UI–1.8
5UI–1.0
5UI–2.3
CYP15G0402DXA REFCLK Switching Characteristics Over the Operating Range
Parameter
Description
f_REF
t_REFCLK
t_REFH
REFCLK Clock Output Frequency
REFCLK Period
REFCLK HIGH Time (TXRATE = HIGH)
REFCLK HIGH Time (TXRATE = LOW)
t_REFL
REFCLK LOW Time (TXRATE = HIGH)
REFCLK LOW Time (TXRATE = LOW)
t_REFD
REFCLK Duty Cycle
t_REF
RXCLKx Rise Time
t_REFF
t_REFDS[21]
t_REFDH[21]
t_RREFDA[21]
RXCLKx Fall Time
Transmit Data Hold Time to REFCLK (TXCKSEL = LOW)
Transmit Data Hold Time to REFCLK (TXCKSEL = LOW
Receive Data Access Time from REFCLK (RXCKSEL = LOW)
t_RREFDV
Receive Data Valid Time from REFCLK (RXCKSEL = LOW)
t_RREFDV-
Receive Data Valid Time from RXCLKA (RXCKSEL = LOW)
t_RREFDV+
Receive Data Valid Time from RXCLKA (RXCKSEL = LOW)
t_RREFCDV-
Receive Data Valid Time from RXCLKC (RXCKSEL = LOW)
t_RREFCDV+
Receive Data Valid Time from RXCLKC (RXCKSEL = LOW)
t_REFRX
REFCLK Frequency Referenced to Received Clock Period
Notes:
20. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
21. Parallel data output or input specifications are only valid if all signals are loaded with similar DC and AC loads.
Min.
20
6.6
5.9
2.9
5.9
2.9
30
2
1
4.0
1.5
1.5
3.0
0.5
-0.02
Max.
150
50
24
25
24
25
+1.0
1.2
1.2
Max.
150
100
24
35
24
35
70
2
2
9.5
+0.02
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
MHz
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
Document #: 38-02023 Rev. *B
Page 22 of 27