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CY8C24633-24PVXIT Datasheet, PDF (20/52 Pages) Cypress Semiconductor – PSoC® Programmable System-on-Chip
CY8C24633
Table 11. 3.3 V DC Operational Amplifier Specifications
Symbol
Description
VOSOA
Input offset voltage (absolute value)
Power = low, opamp bias = high
Power = medium, opamp bias = high
Power = high, opamp bias = high
TCVOSOA
IEBOA
CINOA
Average input offset voltage drift
Input leakage current (port 0 analog pins)
Input capacitance (port 0 analog pins)
VCMOA Common mode voltage range
GOLOA
Open loop gain
power = low, ppamp, Opamp bias = low
Power = medium, opamp bias = low
Power = high, opamp bias = low
VOHIGHOA High output voltage swing (internal signals)
Power = low, opamp bias = low
Power = medium, opamp bias = low
Power = high, opamp bias = low
VOLOWOA Low output voltage swing (internal signals)
Power = low, opamp bias = low
Power = medium, opamp bias = low
Power = high, opamp bias = low
ISOA
Supply current (including associated AGND
buffer)
Power = low, opamp bias = low
Power = low, opamp bias = high
Power = medium, opamp bias = low
Power = medium, opamp bias = high
Power = high, opamp bias = low
Power = high, opamp bias = high
PSRROA Supply voltage rejection ratio
Min Typ Max Units
Notes
Power = high, opamp bias = high
–
1.65 10
mV setting is not allowed for 3.3 V VDD
–
1.32
8
mV operation.
–
–
–
mV
–
7.0 35.0 µV/°C
–
20
–
pA Gross tested to 1 A
–
4.5
9.5
pF Package and pin dependent.
Temp = 25 °C
0.2
– VDD – 0.2 V The common-mode input voltage
range is measured through an
analog output buffer. The
specification includes the
limitations imposed by the
characteristics of the analog
output buffer.
60
–
60
–
80
–
Specification is applicable at low
–
dB Opamp bias. For high opamp bias
–
dB mode (except high power, high
–
dB opamp bias), minimum is 60 dB.
Power = high, opamp bias = high
VDD – 0.2 –
–
V setting is not allowed for 3.3 V VDD
VDD – 0.2 –
–
V operation.
VDD – 0.2 –
–
V
Power = high, opamp bias = high
–
–
0.2
V setting is not allowed for 3.3 V VDD
–
–
0.2
V operation.
–
–
0.2
V
Power = high, opamp bias = high
setting is not allowed for 3.3 V VDD
–
150 200
A operation.
–
300 400
A
–
600 800
A
–
1200 1600 A
–
2400 3200 A
–
–
–
A
64
80
–
dB VSS VIN (VDD – 2.25) or
(VDD – 1.25 V) VIN  VDD
DC Low Power Comparator Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V
and –40 °C  TA  85 °C, or 3.0 V to 3.6 V and –40 °C  TA  85 °C, respectively. Typical parameters apply to 5 V and 3.3 V at 25 °C
and are for design guidance only.
Table 12. DC Low Power Comparator Specifications
Symbol
VREFLPC
ISLPC
VOSLPC
Description
Low power comparator (LPC) reference
voltage range
LPC supply current
LPC voltage offset
Min Typ Max Units
0.2
–
Vdd - 1
V
–
10
40
A
–
2.5
30
mV
Notes
Document Number: 001-20160 Rev. *H
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