CY8C20234 Datasheet, PDF (19/32 Pages) Cypress Semiconductor – PSoC® Mixed-Signal Array

CY8C20234, CY8C20334, CY8C20434 Final Data Sheet
2. Electrical Specifications
2.4.5 AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ TA ≤ 85°C, 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, or 2.4V to 3.0V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters
apply to 5V, 3.3V, or 2.7V at 25°C and are for design guidance only.
Table 2-16. 5V AC External Clock Specifications
Symbol
FOSCEXT
–
–
–
Description
Frequency
High Period
Low Period
Power Up IMO to Switch
Min
0.750
38
38
150
Typ
–
–
–
–
Max
12.6
5300
–
–
Units
MHz
ns
ns
µs
Notes
Table 2-17. 3.3V AC External Clock Specifications
Symbol
FOSCEXT
Description
Frequency with CPU Clock divide by 1
–
High Period with CPU Clock divide by 1
–
Low Period with CPU Clock divide by 1
–
Power Up IMO to Switch
Min
0.750
41.7
41.7
150
Typ
–
–
–
–
Max
12.6
5300
–
–
Units
MHz
ns
ns
µs
Notes
Maximum CPU frequency is 12 MHz at 3.3V.
With the CPU clock divider set to 1, the external
clock must adhere to the maximum frequency
and duty cycle requirements.
Table 2-18. 2.7V AC External Clock Specifications
Symbol
FOSCEXT
Description
Frequency with CPU Clock divide by 1
FOSCEXT
Frequency with CPU Clock divide by 2 or greater
–
High Period with CPU Clock divide by 1
–
Low Period with CPU Clock divide by 1
–
Power Up IMO to Switch
Min
0.750
0.15
160
160
150
Typ
–
–
–
–
–
Max
3.08⁰
6.35
5300
–
–
Units
MHz
MHz
ns
ns
µs
Notes
Maximum CPU frequency is 3 MHz at 2.7V.
With the CPU clock divider set to 1, the external
clock must adhere to the maximum frequency
and duty cycle requirements.
If the frequency of the external clock is greater
than 3 MHz, the CPU clock divider must be set
to 2 or greater. In this case, the CPU clock
divider will ensure that the fifty percent duty
cycle requirement is met.
September 18, 2006
Document No. 001-05356 Rev. *B
19
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