CY14C101I_13 Datasheet, PDF (19/42 Pages) Cypress Semiconductor – 1-Mbit (128 K x 8) Serial (I2C) nvSRAM with Real Time Clock

CY14C101I
CY14B101I
CY14E101I
Device ID
Device ID is a 4-byte code consisting of JEDEC assigned manufacturer ID, product ID, density ID, and die revision. These registers
are set in the factory and are read only registers for the user.
Table 6. Device ID
Device
CY14C101I
CY14B101I
CY14E101I
Device ID
(4 bytes)
0x0681E2A0
0x0681EAA0
0x0681F2A0
31–21
(11 bits)
Manufacturer ID
00000110100
00000110100
00000110100
Device ID Description
20–7
(14 bits)
6–3
(4 bits)
Product ID
Density ID
00001111000101
0100
00001111010101
0100
00001111100101
0100
2–0
(3 bits)
Die Rev
000
000
000
The device ID is divided into four parts as shown in Table 6:
1. Manufacturer ID (11 bits)
This is the JEDEC assigned manufacturer ID for Cypress.
JEDEC assigns the manufacturer ID in different banks. The first
three bits of the manufacturer ID represent the bank in which ID
is assigned. The next eight bits represent the manufacturer ID.
Cypress manufacturer ID is 0x34 in bank 0. Therefore the
manufacturer ID for all Cypress nvSRAM products is as given
below:
Cypress ID - 000_0011_0100
2. Product ID (14 bits)
The product ID for device is shown in the Table 6.
3. Density ID (4 bits)
The 4-bit density ID is used as shown in Table 6 for indicating the
1 Mb density of the product.
4. Die Rev (3 bits)
This is used to represent any major change in the design of the
product. The initial setting of this is always 0x0.
Executing Commands Using Command Register
The Control Registers Slave allows different commands to be
executed by writing the specific command byte in the Command
Register (0xAA). The command byte codes for each command
are specified in Table 5. During the execution of these
commands the device is not accessible and returns a NACK if
any of the three slave devices is selected. If an invalid command
is sent by the master, the nvSRAM responds with an ACK
indicating that the command has been acknowledged with NOP
(No Operation). The address rolls over to the 0x00 location.
By Master
SDA Line
By nvSRAM
Figure 35. Command Execution using Command Register
S
T
A
Control Register
R
Slave Address
T
Command Register Address
Command Byte
S 0 0 1 1 A2 A1 X 0
1 01 0 1 0 10
A
A
S
T
O
P
P
A
Document Number: 001-54391 Rev. *K
Page 19 of 42