CY14B256K_09 Datasheet, PDF (19/28 Pages) Cypress Semiconductor – 256 Kbit (32K x 8) nvSRAM with Real Time Clock

CY14B256K
AutoStore or Power Up RECALL
Parameter
t_HRECALL ^[17]
t_STORE ^{[18, 19]}
V_SWITCH
t_VCCRISE
Description
Power Up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger Level
VCC Rise Time
Commercial
Industrial
CY14B256K
Min
Max
40
12.5
15
2.65
150
Figure 12. AutoStore/Power Up RECALL
V_CC
STORE occurs only
if a SRAM write
has happened
V_SWITCH
Unit
ms
ms
ms
V
μs
No STORE occurs
without atleast one
SRAM write
tVCCRISE
AutoStore
POWER-UP RECALL
Read & Write Inhibited
tHRECALL
tSTORE
tHRECALL
tSTORE
Notes
17. t_HRECALL starts from the time V_CC rises above V_SWITCH.
18. If an SRAM Write does not taken place since the last nonvolatile cycle, no STORE takes place.
19. Industrial Grade Devices require 15 ms Max.
Document Number: 001-06431 Rev. *H
Page 19 of 28
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