W305B Datasheet, PDF (18/21 Pages) Cypress Semiconductor – Frequency Controller with System Recovery for Intel Integrated Core Logic

Group Skew and Jitter Limits
Output Group
CPU
SDRAM
APIC
48MHz
3V66
PCI
REF
Pin-Pin Skew Max.
175 ps
250 ps
250 ps
250 ps
175 ps
500 ps
N/A
Cycle-Cycle Jitter
250 ps
250 ps
500 ps
500 ps
500 ps
500 ps
1000 ps
Duty Cycle
45/55
45/55
45/55
45/55
45/55
45/55
45/55
Nom Vdd
2.5V
3.3V
2.5V
3.3V
3.3V
3.3V
3.3V
W305B
Skew, Jitter
Measure Point
1.25V
1.5V
1.25V
1.5V
1.5V
1.5V
1.5V
Output
Buffer
Test Point
Clock Output Wave
2.0
1.25
2.5V Clocking
Interface
0.4
T_HIGH
T_RISE
T_FALL
Test Load
T_PERIOD
Duty Cycle
T_LOW
T_HIGH
T_PERIOD
Duty Cycle
2.4
3.3V Clocking ^1.5
Interface ^0.4
T_RISE
T_FALL
Figure 6. Output Buffer
Ordering Information
Ordering Code
W305BH
W305BHH
Lead Free
CYW305OXC
CYW305OXCT
Package Type
56-pin SSOP (300 mils)
56-pin SSOP (300 mils) – Tape and Reel
56-pin SSOP (300 mils)
56-pin SSOP (300 mils) – Tape and Reel
T_LOW
Operating Range
Commercial
Commercial
Commercial
Commercial
Document #: 38-07262 Rev. *B
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