CYRF89235 Datasheet, PDF (17/45 Pages) Cypress Semiconductor – PRoC™ USB

CYRF89235
DC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 7. DC Chip-Level Specifications
Symbol
V_IN ^{[5, 6, 7, 8]}
Description
Supply voltage
V_INUSB ^{[5, 6, 7, 8]} Operating voltage
Conditions
Min
Typ
Max
No USB activity. Refer the table
1.9
–
3.6
DC POR and LVD
Specifications on page 23
USB activity,
USB regulator bypassed
3.15
3.3
3.45
I_DD24
Supply current, IMO = 24 MHz Conditions are VIN  3.0 V,
–
2.88
4.00
T_A = 25 °C, CPU = 24 MHz.
no I/O sourcing current
I_DD12
Supply current, IMO = 12 MHz Conditions are VIN  3.0 V,
–
1.71
2.60
T_A = 25 °C, CPU = 12 MHz.
no I/O sourcing current
I_DD6
Supply current, IMO = 6 MHz Conditions are VIN  3.0 V,
–
1.16
1.80
T_A = 25 °C, CPU = 6 MHz.
no I/O sourcing current
I_SB0
Deep sleep current
VIN  3.0 V, T_A = 25 °C, I/O
–
0.10
1.05
regulator turned off
I_SB1
I_SBI2C
Standby current with POR, LVD VIN  3.0 V, T_A = 25 °C, I/O
–
and sleep timer
regulator turned off
Standby current with I²C enabled Conditions are VIN = 3.3 V,
–
T_A = 25 °C and CPU = 24 MHz
1.07
1.50
1.64
–
Units
V
V
mA
mA
mA
A
A
A
Notes
5. If powering down in standby sleep mode, to properly detect and recover from a VIN brown out condition any of the following actions must be taken:
Bring the device out of sleep before powering down.
Assure that VIN falls below 100 mV before powering back up.
Set the No Buzz bit in the OSC_CR0 register to keep the voltage monitoring circuit powered during sleep.
Increase the buzz rate to assure that the falling edge of VIN is captured. The rate is configured through the PSSDC bits in the SLP_CFG register.
For the referenced registers, refer to the enCoRe V Technical Reference Manual. In deep sleep mode, additional low power voltage monitoring circuitry allows VIN
brown out conditions to be detected for edge rates slower than 1 V/ms.
6. Always greater than 50 mV above V_PPOR1 voltage for falling supply.
7. Always greater than 50 mV above V_PPOR2 voltage for falling supply.
8. Always greater than 50 mV above V_PPOR3 voltage for falling supply.
Document Number: 001-77748 Rev. *F
Page 17 of 45