CY7C1371B Datasheet, PDF (17/26 Pages) Cypress Semiconductor – 512K x 36/1M x 18 Flow-Thru SRAM with NoBL Architecture

Capacitance^[14.]
Parameter
Description
C_IN
C_CLK
C_I/O
Input Capacitance
Clock Input Capacitance
I/O Capacitance
AC Test Loads and Waveforms
Test Conditions
T_A = 25°C, f = 1 MHz,
V_DD = V_DDQ = 2.5V
CY7C1371B
CY7C1373B
Max.
Unit
3
pF
3
pF
3
pF
OUTPUT
Z₀ = 50Ω
V_DDQ
OUTPUT
R_L = 50Ω
5 pF
V_L = 1.5V
(a)
INCLUDING
JIG AND
SCOPE
R = 317Ω
V_DD
10%
GND
R = 351Ω
< 1V/ns
ALL INPUT PULSES^[16]
90%
90%
10%
< 1V/ns
(b)
(c)
Thermal Resistance^[15]
Description
119 BGA
165 FBGA
Test Conditions
Still Air, soldered on a 114.3 × 101.6 × 1.57 mm3,
two-layer board
Q_JA
(Junction to Ambient)
41.54
44.51
100-pin TQFP
Still Air, soldered on a 4.25 × 1.125 inch, four-layer
25
printed circuit board
Notes:
15. Tested initially and after any design or process change that may affect these parameters.
16. Input waveform should have a slew rate of 1 V/ns.
Q_JC
(Junction to Case)
6.33
2.38
9
Units
°C/W
°C/W
°C/W
Document #: 38-05198 Rev. **
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