CY14B512Q1 Datasheet, PDF (17/27 Pages) Cypress Semiconductor – 512-Kbit (64 K × 8) Serial (SPI) nvSRAM

CY14B512Q1
CY14B512Q2
CY14B512Q3
Data Retention and Endurance
Parameter
DATA_R
NV_C
Capacitance
Description
Data retention
Nonvolatile STORE operations
Parameter^[7]
Description
C_IN
C_OUT
Input capacitance
Output pin capacitance
Thermal Resistance
Test Conditions
T_A = 25 °C, f = 1 MHz,
V_CC = V_CC (Typ)
Parameter ^[7]
Θ_JA
Θ_JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA / JESD51.
Figure 20. AC Test Loads and Waveforms
3.0 V
Output
30 pF
577 Ω
R1
R2
789 Ω
3.0 V
Output
5 pF
Min
20
1,000
Unit
Years
K
Max
Unit
6
pF
8
pF
16-SOIC
55.17
2.64
8-DFN
17.7
18.8
Unit
°C / W
°C / W
577 Ω
R1
R2
789 Ω
AC Test Conditions
Input pulse levels.................................................... 0 V to 3 V
Input rise and fall times (10% to 90%)......................... < 3 ns
Input and output timing reference levels........................ 1.5 V
Note
7. These parameters are guaranteed by design and are not tested.
Document #: 001-53873 Rev. *E
Page 17 of 27
[+] Feedback