S6E2C5 Datasheet, PDF (169/200 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C5 Series
High-Speed Mode
Clock CLK (All values are referred to VIH and VIL)
Parameter
Clock frequency Data
Transfer Mode
Clock low time
Clock high time
Clock rise time
Clock fall time
Symbol
fPP
tWL
tWH
tTLH
tTHL
Pin Name
S_CLK
S_CLK
S_CLK
S_CLK
S_CLK
Conditions
CCARD ≤ 10
pF
(1 card)
Card Inputs CMD, DAT (referenced to Clock CLK)
Parameter
Symbol Pin Name
Input set-up time
Input hold time
tISU
S_CMD,
S_DATA3: 0
tIH
S_CMD,
S_DATA3: 0
Conditions
CCARD ≤ 10
pF
(1 card)
Card Outputs CMD, DAT (referenced to Clock CLK)
Parameter
Symbol Pin Name Conditions
Output delay time during
data transfer mode
Output hold time
Total system capacitance
for each line*
tODLY
tOH
CL
S_CMD,
S_DATA3: 0
S_CMD,
S_DATA3: 0
-
CL ≤ 40 pF
(1 card)
CL ≥ 15 pF
(1 card)
1 card
*: In order to satisfy severe timing, host shall drive only one card.
(VCC = 2.7V to 3.6V, VSS = 0V)
Value
Min
Max
Remarks
0
50
MHz
7
-
ns
7
-
ns
-
3
ns
-
3
ns
Value
Min
Max
6
-
2
-
Remarks
ns
ns
Value
Min
Max
0
14
2.5
-
-
40
Remarks
ns
ns
pF
S_CLK
(SD Clock)
S_CMD,
S_DATA3: 0
(Card Input)
S_CMD,
S_DATA3: 0
(Card Output)
tWL
tWH
50%VCC
VIH
VIL
VIL
VIH _50%VCC
VIH
tTHL
tTLH
tISU
tIH
VIH
VIH
tODLY(Max)
VIL
VIL
tOH(Min)
VOH
VOH
VOL
VOL
High-Speed Mode
Notes:
− The Card Input corresponds to the Host Output and the Card Output corresponds to the Host Input because this
model is the Host.
− For more information about clock frequency (fPP), see Chapter 15: SD card Interface in FM4 Family Peripheral
Manual Main Part (002-04856).
Document Number: 002-04984 Rev.*A
Page 169 of 200