CY7C64601 Datasheet, PDF (15/42 Pages) Cypress Semiconductor – EZ-USB FX USB Microcontroller Data Sheet

CY7C64601/603/613
3.2 CY7C646xx Pin Descriptions (continued)
128 80 52
Name
Type Default
Description
82 50 32 PB3 or
TXD1 or
D[3] or
GDA[3] or
AFI [3]
I/O/Z
I
(PB3)
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.3 and IFCONFIG[1..0].
PB3 is a bidirectional I/O port pin.
TXD1is an active-HIGH output pin from 8051 UART1, which pro-
vides the output clock in sync mode, and the output data in async
mode.
AFI [3] is the bidirectional A-FIFO data bus.
83 51 33 PB4 or
INT4 or
D[4] or
GDA[4] or
AFI [4]
I/O/Z
I
(PB4)
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.4 and IFCONFIG[1..0].
PB4 is a bidirectional I/O port pin.
INT4 is the 8051 INT4 interrupt request input signal. The INT4 pin
is edge-sensitive, active HIGH.
AFI [4] is the bidirectional A-FIFO data bus.
84 52 34 PB5 or
INT5# or
D[5] or
GDA[5] or
AFI [5]
I/O/Z
I
(PB5)
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.5 and IFCONFIG[1..0].
PB5 is a bidirectional I/O port pin.
INT5# is the 8051 INT5 interrupt request input signal. The INT5 pin
is edge-sensitive, active LOW.
AFI [5] is the bidirectional A-FIFO data bus.
85 53 35 PB6 or
INT6 or
D[6] or
GDA[6] or
AFI [6]
I/O/Z
I
(PB6)
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.6 and IFCONFIG[1..0].
PB6 is a bidirectional I/O port pin.
INT6 is the 8051 INT5 interrupt request input signal. The INT6 pin
is edge-sensitive, active HIGH.
AFI [6] is the bidirectional A-FIFO data bus.
86 54 36 PB7 or
T2OUT or
D[7] or
GDA[7] or
AFI [7]
I/O/Z
I
(PB7)
Multiplexed pin whose function is selected by the following bits:
PORTBCFG.7 and IFCONFIG[1..0].
PB7 is a bidirectional I/O port pin.
T2OUT is the active-HIGH output signal from 8051 Timer2. T2OUT
is active (HIGH) for one clock cycle when Timer/Counter 2 over-
flows.
AFI [7] is the bidirectional A-FIFO data bus.
Port C
110 68
43 PC0 or
RXD0 or
RDY0
I/O/Z
I
(PC0)
Multiplexed pin whose function is selected by the PORTCCFG.0 and
PORTCGPIF.0 bits.
PC0 is a bidirectional I/O port pin.
RXD0 is the active-HIGH RXD0 input to 8051 UART0, which pro-
vides data to the UART in all modes.
RDY0 is a GPIF input signal.
111 69 44 PC1 or
TXD0 or
RDY1
I/O/Z
I
(PC1)
Multiplexed pin whose function is selected by the PORTCCFG.1 and
PORTCGPIF.1 bits.
PC1 is a bidirectional I/O port pin.
TXD0 is the active-HIGH TXD0 output from 8051 UART0, which
provides the output clock in sync mode, and the output data in async
mode.
RDY1 is a GPIF input signal.
112 70 45 PC2 or
INT0#
I/O/Z
I
(PC2)
Multiplexed pin whose function is selected by the PORTCCFG.2 bit.
PC2 is a bidirectional I/O port pin.
INT0# is the active-LOW 8051 INT0 interrupt input signal, which is
either edge triggered (IT0 = 1) or level triggered (IT0 = 0).
113 71
46 PC3 or
INT1# or
RDY3
I/O/Z
I
(PC3)
Multiplexed pin whose function is selected by the: PORTCCFG.3
and PORTCGPIF.3 bits.
PC3 is a bidirectional I/O port pin.
INT1# is the active-LOW 8051 INT1 interrupt input signal, which is
either edge triggered (IT1 = 1) or level triggered (IT1 = 0).
RDY3 is a GPIF input signal.
Document #: 38-08005 Rev. **
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