CY7C1522V18 Datasheet, PDF (14/28 Pages) Cypress Semiconductor – 72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

TAP Controller State Diagram^[10]
1
TEST-LOGIC
RESET
0
0
TEST-LOGIC/ ¹
IDLE
SELECT
1
DR-SCAN
0
1
CAPTURE-DR
0
SHIFT-DR
0
1
1
EXIT1-DR
0
PAUSE-DR
0
1
0
EXIT2-DR
1
UPDATE-DR
1
0
Note:
10. The 0/1 next to each state represents the value at TMS at the rising edge of TCK.
CY7C1522V18
CY7C1529V18
CY7C1523V18
CY7C1524V18
1
SELECT
IR-SCAN
0
1
CAPTURE-IR
0
SHIFT-IR
0
1
EXIT1-IR
1
0
PAUSE-IR
0
1
0
EXIT2-IR
1
UPDATE-IR
1
0
Document #: 38-05564 Rev. *D
Page 14 of 28