CY14MB064Q1B Datasheet, PDF (13/28 Pages) Cypress Semiconductor – 64-Kbit (8 K × 8) SPI nvSRAM

CY14MB064Q1B/CY14MB064Q2B
PRELIMINARY _{CY14ME064Q1B/CY14ME064Q2B}
CS
SCK
SI
SO
Figure 10. Read Instruction Timing
0 1 2 34 5 67 0 1 23 45 6 7
12 13 14 15 0 1 2 3 4 5 6 7
Op-Code
13-bit Address
0 0 0 0 0 0 1 1 X X X A12 A11 A10 A9 A8
MSB
A3 A2 A1 A0
LSB
HI-Z
D7 D6 D5 D4 D3 D2 D1 D0
MSB
Data
LSB
CS
SCK
SI
SO
Figure 11. Burst Mode Read Instruction Timing
01 2 3 456 7 01 2 3 45 6 7
12 13 14 15 0 1 2 3 4 5 6 7 0 7 0 1 2 3 4 5 6 7
Op-Code
13-bit Address
0 0 0 0 0 0 1 1 X X X A12 A11 A10 A9 A8
MSB
A3 A2 A1 A0
LSB
Data Byte 1
Data Byte N
HI-Z
D7 D6 D5 D4 D3 D2 D1 D0 D7 D0 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
MSB
LSB
CS
SCK
SI
SO
Figure 12. Write Instruction Timing
0 1 2 34 5 67 0 1 23 4 56 7
12 13 14 15 0 1 2 3 4 5 6 7
Op-Code
13-bit Address
0 0 0 0 0 0 1 0 X X X 12 11 10 9 8
MSB
3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0
LSB MSB
Data
LSB
HI-Z
Document Number: 001-70382 Rev. *E
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