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W199 Datasheet, PDF (12/14 Pages) Cypress Semiconductor – Spread Spectrum FTG for VIA Apollo Pro-133
PRELIMINARY
W199
SDRAM 0:11,_F Clock Outputs (Lump Capacitance Test Load = 22 pF)
SDRAMIN =
66.8 MHz
SDRAMIN =
100 MHz
SDRAMIN =
133 MHz
Parameter Description Test Condition/Comments Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
tP
Period
Measured on rising edge at 15
1.5V
15.5 10
10.5 7.5
8.0 ns
tH
High Time
Duration of clock cycle above 5.2
3.0
1.87
ns
2.4V
tL
Low Time
Duration of clock cycle below 5.0
2.0
1.67
ns
0.4V
tR
Output Rise Edge Measured from 0.4V to 2.4V 1
Rate
41
41
4 V/ns
tF
Output Fall Edge Measured from 2.4V to 0.4V 1
41
41
4 V/ns
Rate
tD
Duty Cycle
Measured on rising and falling 45
55 45
55 45
55 %
edge at 1.5V
tJC
Jitter,
Measured on rising edge at
Cycle-to-Cycle 1.5V. Maximum difference of
cycle time between two adja-
cent cycles.
250
250
250 ps
tSK
Output Skew
Measured on rising and falling
250
250
250 ps
edge at 1.5V
tPD
Propagation
Measured from SDRAMIN
3.7
3.7
3.7
ns
Delay
Zo
AC output
Average value during switching
15
15
15
Ω
Impedance
transition. Used for determin-
ing series termination value.
REF0:1 Clock Outputs (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Frequency generated by crystal oscillator
tR
Output Rise Edge Rate Measured from 0.4V to 2.4V
tF
Output Fall Edge Rate Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V.
fST
Frequency Stabilization Assumes full supply voltage reached within 1 ms from
from Power-up (cold power-up. Short cycles exist prior to frequency stabili-
start)
zation.
Zo
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
Min.
0.5
0.5
45
Typ. Max.
14.318
2
2
55
3
40
Unit
MHz
V/ns
V/ns
%
ms
Ω
12