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CYWUSB6935_10 Datasheet, PDF (11/36 Pages) Cypress Semiconductor – WirelessUSB™ LR 2.4 GHz DSSS Radio SoC
CYWUSB6935
Table 7. Configuration
Addr: 0x05
REG_CONFIG
Default: 0x01
7
6
5
4
3
2
1
0
Reserved
IRQ Pin Select
Bit
Name
Description
7:2 Reserved
These bits are reserved and should be written with zeroes.
1:0 IRQ Pin Select The Interrupt Request Pin Select bits are used to determine the drive method of the IRQ pin.
11 = Open Source (IRQ asserted = 1, IRQ deasserted = Hi-Z)
10 = Open Drain (IRQ asserted = 0, IRQ deasserted = Hi-Z)
01 = CMOS (IRQ asserted = 1, IRQ deasserted = 0)
00 = CMOS Inverted (IRQ asserted = 0, IRQ deasserted = 1)
Table 8. SERDES Control
Addr: 0x06
7
6
5
REG_SERDES_CTL
4
3
igns Default: 0x03
Des2
1
0
Bit
Name
7:4 Reserved
3 SERDES
Enable
2:0 EOF Length
Reserved
SERDES
Enable
EOF Length
New Description
r These bits are reserved and should be written with zeroes.
fo The SERDES Enable bit is used to switch between bit-serial mode and SERDES mode.
1 = SERDES enabled
d 0 = SERDES disabled, bit-serial mode enabled
e When the SERDES is enabled data can be written to and read from the IC one byte at a time, through the
d use of the SERDES Data registers. The bit-serial mode requires bits to be written one bit at a time through
n the use of the DIO/DIOVAL pins, refer to section 3.2. It is recommended that SERDES mode be used to avoid
e the need to manage the timing required by the bit-serial mode.
m The End of Frame Length bits are used to set the number of sequential bit times for an inter-frame gap without
m valid data before an EOF event will be generated. When in receive mode and a valid bit has been received
o the EOF event can then be identified by the number of bit times that expire without correlating any new data.
c The EOF event causes data to be moved to the proper SERDES Data Register and can also be used to
e generate interrupts. If 0 is the EOF length, an EOF condition will occur at the first invalid bit after a valid
Not R reception.
Document Number : 38-16008 Rev. *G
Page 11 of 36
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