CY7C1516V18 Datasheet, PDF (11/28 Pages) Cypress Semiconductor – 72-Mbit DDR-II SRAM 2-Word Burst Architecture

CY7C1516V18
CY7C1527V18
CY7C1518V18
CY7C1520V18
Write Cycle Descriptions^{[3, 9]} (CY7C1520V18)
BWS₀ BWS₁ BWS₂ BWS₃ K
L
L
L
L
L-H
L
L
L
L
–
L
H
H
H
L-H
L
H
H
H
–
H
L
H
H
L-H
H
L
H
H
–
H
H
L
H
L-H
H
H
L
H
–
H
H
H
L
L-H
H
H
H
L
–
H
H
H
H
L-H
H
H
H
H
–
K
Comments
– During the Data portion of a Write sequence, all four bytes (D_[35:0]) are
written into the device.
L-H During the Data portion of a Write sequence, all four bytes (D_[35:0]) are
written into the device.
– During the Data portion of a Write sequence, only the lower byte (D_[8:0]) is
written into the device. D_[35:9] will remain unaltered.
L-H During the Data portion of a Write sequence, only the lower byte (D_[8:0]) is
written into the device. D_[35:9] will remain unaltered.
– During the Data portion of a Write sequence, only the byte (D_[17:9]) is
written into the device. D_[8:0] and D_[35:18] will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D_[17:9]) is
written into the device. D_[8:0] and D_[35:18] will remain unaltered.
– During the Data portion of a Write sequence, only the byte (D_[26:18]) is
written into the device. D_[17:0] and D_[35:27] will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D_[26:18]) is
written into the device. D_[17:0] and D_[35:27] will remain unaltered.
During the Data portion of a Write sequence, only the byte (D_[35:27]) is
written into the device. D_[26:0] will remain unaltered.
L-H During the Data portion of a Write sequence, only the byte (D_[35:27]) is
written into the device. D_[26:0] will remain unaltered.
– No data is written into the device during this portion of a Write operation.
L-H No data is written into the device during this portion of a Write operation.
Write Cycle Descriptions^{[3, 9]}(CY7C1527V18)
BWS₀
L
K
K
Comments
L-H
– During the Data portion of a Write sequence, the single byte (D_[8:0]) is
written into the device.
L
–
L-H During the Data portion of a Write sequence, the single byte (D_[8:0]) is
written into the device.
H
L-H
– No data is written into the device during this portion of a Write operation.
H
–
L-H No data is written into the device during this portion of a Write operation.
Note:
9. Assumes a Write cycle was initiated per the Write Port Cycle Description Truth Table. NWS₀, NWS_1,BWS₀, BWS_1,BWS₂ and BWS₃ can be altered on different
portions of a write cycle, as long as the set-up and hold requirements are achieved.
Document #: 38-05563 Rev. *D
Page 11 of 28
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