CY28RS480-1 Datasheet, PDF (11/16 Pages) Cypress Semiconductor – Clock Generator for ATI RS480 Chipset

PRELIMINARY
AC Electrical Specifications (continued)
Parameter
Description
Condition
CPU outputs
TR/TF
Output Slew Rate
Measured @ test load using VOCM
+/-400 mV, 0.85 to 1.65
V_DIFF
TSKEW
∆ V_DIFF
V_CM
Differential Voltage
Any CPU to CPU Clock Skew
Change in VDIFF_DC Magnitude
Common Mode Voltage
Measured at load single ended
Measured at crossing point V_OX
Measured at load single ended
Crossing Voltage (+)
Crossing Voltage (-)
∆ V_CM
T_DC
T_JCYC
SRC
T_DC
T_PERIOD
T_PERIODSS
T_PERIODAbs
Change in V_CM
Duty Cycle
Cycle to Cycle Jitter
Measured at load single ended
Measured at V_OX
Measured at V_OX
SRCT and SRCC Duty Cycle
Measured at crossing point V_OX
100-MHz SRCT and SRCC Period
Measured at crossing point V_OX
100-MHz SRCT and SRCC Period, SSC Measured at crossing point V_OX
100-MHz SRCT and SRCC Absolute Measured at crossing point V_OX
Period
T_PERIODSSAbs 100-MHz SRCT and SRCC Absolute Measured at crossing point V_OX
Period, SSC
T_SKEW
TSKEW
Any SRCT/C to SRCT/C Clock Skew
Any SRCS clock to Any SRCS clock
Skew
Measured at crossing point V_OX
Measured at crossing point V_OX
T_CCJ
L_ACC
T_R / T_F
SRCT/C Cycle to Cycle Jitter
SRCT/C Long Term Accuracy
SRCT and SRCC Rise and Fall Times
T_RFM
Rise/Fall Matching
∆T_R
Rise TimeVariation
∆T_F
Fall Time Variation
V_HIGH
Voltage High
V_LOW
Voltage Low
V_OX
Crossing Point Voltage at 0.7V Swing
V_OVS
Maximum Overshoot Voltage
V_UDS
Minimum Undershoot Voltage
V_RB
Ring Back Voltage
HTT66 HyperTransport Output
F66
Operating Frequency
Measured at crossing point V_OX
Measured at crossing point V_OX
Measured from V_OL = 0.175 to
V_OH = 0.525V
Determined as a fraction of
2*(T_R – T_F)/(T_R + T_F)
Math averages Figure 8
Math averages Figure 8
See Figure 8. Measure SE
TDC
Duty Cycle
Measured at 1.5V
TR/TF
Slew Rate, Rise Time
Measured at 20% and 60%
Slew Rate, Fall Time
TCCJ
Cycle to Cycle jitter
Measured at 1.5V
TSKEW
HTT66 clock to PCI clock Skew
Measurement at 1.5V
PCI
T_DC
T_PERIOD
PCI Duty Cycle
Spread Disabled PCIF/PCI Period
Measurement at 1.5V
Measurement at 1.5V
CY28RS480-1
Min.
Max. Unit
1.6
0.4
–
–150
1.05
0.97
–200
45
0
7
V/ns
2.3
V
250
ps
150 mV
1.45
V
1.45
V
200 mV
55
%
200
ps
45
55
%
9.997001 10.00300 ns
9.997001 10.05327 ns
9.872001 10.12800 ns
9.872001 10.17827 ns
–
250
ps
-
250
ps
–
125
ps
–
300 ppm
175
700
ps
–
20
%
–
–
660
–150
250
–
–0.3
–
125
ps
125
ps
850 mv
–
mv
550 mV
V_HIGH + 0.3 V
–
V
0.2
V
66.67 MHz
45
55
%
0.9
5.4 V/ns
0.9
4.8
–
275
ps
–
1200 ps
45
55
%
29.99100 30.00900 ns
Document #: 38-07714 Rev. *C
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