CY28RS480-1 Datasheet, PDF (1/16 Pages) Cypress Semiconductor – Clock Generator for ATI RS480 Chipset

PRELIMINARY
CY28RS480-1
Clock Generator for ATI^ RS480 Chipset
Features
• Supports AMD^ CPU
• Selectable CPU frequencies
• 200-MHz differential CPU clock pairs
• 100-MHz differential SRC clocks
• 48-MHz USB clock
• 33-MHz PCI clock
• 66-MHz HyperTransport clock
• I²C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 56-pin SSOP and TSSOP packages
CPU SRC HTT66 PCI
x2
x8
x1
x1
REF USB_48
x3
x1
Block Diagram
XIN
XOUT
CPU_STP#
CLKREQ[0:1]#
XTAL
OSC
PLL Ref Freq
PLL1
Divider
Network
IREF
PD
PLL2
SDATA
SCLK
I²C
Logic
Pin Configuration
VDD_REF
REF[0:2]
VDD_CPU
CPUT[0:2], CPUC[0:2],
VDD_SRC
SRCT[0:6],SRCC[0:6]
VDD_SRCS
SRCST[0:1],SRCSC[0:1]
VDD_PCI
PCI
VDD_HTT
HTT66
VDD_48 MHz
USB_48
XIN 1
56
XOUT 2
55
VDD_48 3
54
USB_48 4
53
VSS_48 5
52
CLK_STOP 6
51
SCLK 7
50
SDATA 8
49
NC 9
48
CLKREQ#0 10
47
CLKREQ#1 11
46
SRCT5 12
45
SRCC5 13
44
VDD_SRC 14
43
VSS_SRC 15
42
SRCT4 16
41
SRCC4 17
40
SRCT3 18
39
SRCC3 19
38
VSS_SRC 20
37
VDD_SRC 21
36
SRCT2 22
35
SRCC2 23
34
SRCT1 24
33
SRCC1 25
32
VSS_SRC 26
31
SRCST1 27
30
SRCSC1 28
29
56 SSOP/TSSOP
VDD_REF
VSS_REF
REF0
REF1
REF2
VDD_PCI
PCI0
VSS_PCI
VDD_HTT
HTT66
VSS_HTT
CPUT0
CPUC0
VDD_CPU
VSS_CPU
CPUT1
CPUC1
VDDA
VSSA
IREF
VSS_SRC
VDD_SRC
SRCT0
SRCC0
VDD_SRC1
VSS_SRC1
SRCST0
SRCSC0
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07714 Rev. *C
Revised August 4, 2005