CY8C20234_09 Datasheet, PDF (10/34 Pages) Cypress Semiconductor – PSoC Programmable System-0n-Chip

32-Pin Part Pinout
CY8C20234, CY8C20334
CY8C20434, CY8C20534
Figure 5. CY8C20434 32-Pin PSoC Device
AI, P0[1] 1
AI, P2[7] 2
AI, P2[5] 3
AI, P2[3] 4
AI, P2[1] 5
AI, P3[3] 6
AI, P3[1] 7
SPI SS, P1[7] 8
AI, I2C SCL
QFN
(Top View)
24 P0[0], AI
23 P2[6], AI
22 P2[4], AI
21 P2[2], AI
20 P2[0], AI
19 P3[2], AI
18 P3[0], AI
17 XRES
Table 5. Pin Definitions - CY8C20434 32-Pin (QFN) ^[2]
Type
Pin No.
Digital Analog
Name
Description
1
I/O
I
2
I/O
I
3
I/O
I
4
I/O
I
5
I/O
I
6
I/O
I
7
I/O
I
8
IOH
I
9
IOH
I
10
IOH
I
11
IOH
I
12
Power
13
IOH
I
14
IOH
I
15
IOH
I
16
IOH
I
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
P3[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
I²C SCL, SPI SS
I²C SDA, SPI MISO
SPI CLK
CLK^[1], I²C SCL, SPI MOSI
Ground Connection
DATA^[1], I²C SDA
Optional External Clock Input (EXTCLK)
17
Input
18
I/O
I
19
I/O
I
20
I/O
I
21
I/O
I
22
I/O
I
XRES
P3[0]
P3[2]
P2[0]
P2[2]
P2[4]
Active High External Reset With Internal Pull Down
Document Number: 001-05356 Rev. *H
Page 10 of 34
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